mb/lenovo/m900_tiny: add board

.github/workflows/build.yml

@@ -97,3 +97,35 @@ jobs:
           path: |
             build/coreboot.rom
           retention-days: 30
+  build_lenovo:
+    runs-on: ubuntu-22.04
+    container:
+      image: coreboot/coreboot-sdk:2021-09-23_b0d87f753c
+      options: --user 1001
+    strategy:
+      matrix:
+        vendor: [ lenovo ]
+        model: [ m900_tiny ]
+    steps:
+      - name: Checkout repository
+        uses: actions/checkout@v3
+        with:
+          # Checkout pull request HEAD commit instead of merge commit
+          # See: https://github.com/actions/checkout#checkout-pull-request-head-commit-instead-of-merge-commit
+          ref: ${{ github.event.pull_request.head.sha }}
+          # Fetch complete history
+          fetch-depth: 0
+      - name: Checkout all submodules
+        run: git submodule update --init --recursive --checkout
+      - name: Build Dasharo
+        run: |
+          cp configs/config.${{ matrix.vendor }}_${{ matrix.model }} .config
+          make olddefconfig
+          make
+      - name: Save artifacts
+        uses: actions/upload-artifact@v2
+        with:
+          name: "dasharo-${{ matrix.vendor }}-${{ matrix.model }}-${{ matrix.build }}"
+          path: |
+            build/coreboot.rom
+          retention-days: 30

configs/config.lenovo_m900_tiny

@@ -0,0 +1,39 @@
+CONFIG_VENDOR_LENOVO=y
+CONFIG_CBFS_SIZE=0x600000
+CONFIG_ONBOARD_VGA_IS_PRIMARY=y
+CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_EDK2_BOOTSPLASH_FILE="3rdparty/dasharo-blobs/dasharo/bootsplash.bmp"
+CONFIG_TPM_MEASURED_BOOT=y
+CONFIG_USE_COREBOOT_MP_INIT=y
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_RUN_FSP_GOP=y
+CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=y
+CONFIG_DRIVERS_EFI_VARIABLE_STORE=y
+CONFIG_PAYLOAD_EDK2=y
+CONFIG_EDK2_REPOSITORY="https://github.com/Dasharo/edk2"
+CONFIG_EDK2_TAG_OR_REV="origin/dasharo"
+CONFIG_EDK2_USE_EDK2_PLATFORMS=y
+CONFIG_EDK2_CBMEM_LOGGING=y
+# CONFIG_EDK2_PS2_SUPPORT is not set
+CONFIG_EDK2_SERIAL_SUPPORT=y
+CONFIG_EDK2_ENABLE_IPXE=y
+CONFIG_EDK2_SECURE_BOOT=y
+# CONFIG_EDK2_SECURE_BOOT_DEFAULT_ENABLE is not set
+CONFIG_EDK2_SATA_PASSWORD=y
+CONFIG_EDK2_OPAL_PASSWORD=y
+CONFIG_EDK2_SETUP_PASSWORD=y
+CONFIG_EDK2_PERFORMANCE_MEASUREMENT_ENABLE=y
+CONFIG_EDK2_DASHARO_SYSTEM_FEATURES=y
+CONFIG_EDK2_DASHARO_SECURITY_OPTIONS=y
+CONFIG_EDK2_SHOW_WIFI_BT_OPTION=y
+CONFIG_EDK2_DASHARO_INTEL_ME_OPTIONS=y
+CONFIG_EDK2_DASHARO_USB_CONFIG=y
+CONFIG_EDK2_DASHARO_NETWORK_CONFIG=y
+CONFIG_EDK2_DASHARO_CHIPSET_CONFIG=y
+CONFIG_EDK2_DASHARO_POWER_CONFIG=y
+CONFIG_EDK2_DASHARO_NETWORK_BOOT_DEFAULT_ENABLE=y
+CONFIG_EDK2_DASHARO_SERIAL_REDIRECTION_DEFAULT_ENABLE=y
+CONFIG_PXE_SERIAL_CONSOLE=y
+CONFIG_PXE_ADD_SCRIPT=y
+CONFIG_PXE_SCRIPT="3rdparty/dasharo-blobs/dasharo/dasharo.ipxe"

src/mainboard/lenovo/m900_tiny/Kconfig

@@ -0,0 +1,44 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+if BOARD_LENOVO_THINKCENTRE_M900_TINY
+
+config BOARD_SPECIFIC_OPTIONS
+	def_bool y
+	select BOARD_ROMSIZE_KB_16384
+	select DRIVERS_UART_8250IO
+	select HAVE_ACPI_RESUME
+	select HAVE_ACPI_TABLES
+	select HAVE_CMOS_DEFAULT
+	select HAVE_OPTION_TABLE
+	select INTEL_GMA_HAVE_VBT
+	select INTEL_INT15
+	select MAINBOARD_HAS_LIBGFXINIT
+	select MAINBOARD_HAS_TPM1
+	select MAINBOARD_USES_IFD_GBE_REGION
+	select MEMORY_MAPPED_TPM
+	select SKYLAKE_SOC_PCH_H
+	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
+	select SOC_INTEL_KABYLAKE
+	select SUPERIO_NUVOTON_NCT6687D
+
+config UART_FOR_CONSOLE
+	default 2 if INTEL_LPSS_UART_FOR_CONSOLE
+	default 0
+
+config MAINBOARD_DIR
+	default "lenovo/m900_tiny"
+
+config MAINBOARD_PART_NUMBER
+	default "ThinkCentre M700 / M900 Tiny"
+
+config PRERAM_CBMEM_CONSOLE_SIZE
+	default 0xd00
+
+config DIMM_SPD_SIZE
+	default 512 #DDR4
+
+# TODO: fix and enable
+config DRIVER_LENOVO_SERIALS
+	default n
+
+endif

src/mainboard/lenovo/m900_tiny/Kconfig.name

@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+config BOARD_LENOVO_THINKCENTRE_M900_TINY
+	bool "ThinkCentre M700 / M900 Tiny"

src/mainboard/lenovo/m900_tiny/Makefile.mk

@@ -0,0 +1,13 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
+
+bootblock-y += bootblock.c
+bootblock-y += gpio_early.c
+
+romstage-y += romstage.c
+
+ramstage-y += gpio.c
+ramstage-y += hda_verb.c
+ramstage-y += ramstage.c
+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads

src/mainboard/lenovo/m900_tiny/acpi/ec.asl

@@ -0,0 +1,5 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
+
+/* dummy */

src/mainboard/lenovo/m900_tiny/acpi/superio.asl

@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#define SUPERIO_DEV		SIO0
+#define SUPERIO_PNP_BASE	0x2e
+#define NCT6687D_SHOW_SP1
+#define NCT6687D_SHOW_EC
+
+#include <superio/nuvoton/nct6687d/acpi/superio.asl>

src/mainboard/lenovo/m900_tiny/board_info.txt

@@ -0,0 +1,7 @@
+Category: desktop
+Board URL: https://psref.lenovo.com/Product/ThinkCentre_M900_Tiny
+ROM package: SOIC-8
+ROM protocol: SPI
+ROM socketed: n
+Flashrom support: y
+Release year: 2015

src/mainboard/lenovo/m900_tiny/bootblock.c

@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <bootblock_common.h>
+#include <device/pnp_ops.h>
+#include <mainboard/gpio.h>
+#include <soc/gpio.h>
+#include <superio/nuvoton/common/nuvoton.h>
+#include <superio/nuvoton/nct6687d/nct6687d.h>
+
+#define SERIAL_DEV PNP_DEV(0x2e, NCT6687D_SP1)
+#define POWER_DEV  PNP_DEV(0x2e, NCT6687D_SLEEP_PWR)
+
+void bootblock_mainboard_early_init(void)
+{
+	mainboard_configure_early_gpios();
+
+	/* Replicate vendor settings for multi-function pins in global config LDN */
+	nuvoton_pnp_enter_conf_state(SERIAL_DEV);
+	pnp_write_config(SERIAL_DEV, 0x13, 0x0c);
+	pnp_write_config(SERIAL_DEV, 0x1d, 0x08);
+	pnp_write_config(SERIAL_DEV, 0x1f, 0xf0);
+	pnp_write_config(SERIAL_DEV, 0x22, 0xbc);
+	pnp_write_config(SERIAL_DEV, 0x23, 0xdf);
+	pnp_write_config(SERIAL_DEV, 0x24, 0x81);
+	pnp_write_config(SERIAL_DEV, 0x25, 0xff);
+	pnp_write_config(SERIAL_DEV, 0x29, 0x6d);
+	pnp_write_config(SERIAL_DEV, 0x2a, 0x8f);
+
+	/* Configure pin for PECI */
+	pnp_set_logical_device(POWER_DEV);
+	pnp_write_config(POWER_DEV, 0xf3, 0x0c);
+
+	nuvoton_pnp_exit_conf_state(POWER_DEV);
+
+	/* Enable serial */
+	if (CONFIG(CONSOLE_SERIAL))
+		nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+}

src/mainboard/lenovo/m900_tiny/cmos.default

@@ -0,0 +1,6 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+boot_option=Fallback
+debug_level=Debug
+power_on_after_fail=Disable
+nmi=Enable

src/mainboard/lenovo/m900_tiny/cmos.layout

@@ -0,0 +1,60 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+# -----------------------------------------------------------------
+entries
+
+#start-bit length  config config-ID	name
+
+# -----------------------------------------------------------------
+0	120	r	0	reserved_memory
+
+# -----------------------------------------------------------------
+# RTC_BOOT_BYTE (coreboot hardcoded)
+384	1	e	4	boot_option
+388	4	h	0	reboot_counter
+
+# -----------------------------------------------------------------
+# coreboot config options: console
+395	4	e	6	debug_level
+
+# coreboot config options: cpu
+400	1	e	1	hyper_threading
+
+# coreboot config options: southbridge
+408	1	e	1	nmi
+409	2	e	7	power_on_after_fail
+
+# coreboot config options: ME
+416	1	e	2	me_state
+417	3	h	0	me_state_counter
+
+# coreboot config options: check sums
+984	16	h	0	check_sum
+
+# -----------------------------------------------------------------
+
+enumerations
+
+#ID	value	text
+1	0	Disable
+1	1	Enable
+2	0	Enable
+2	1	Disable
+4	0	Fallback
+4	1	Normal
+6	0	Emergency
+6	1	Alert
+6	2	Critical
+6	3	Error
+6	4	Warning
+6	5	Notice
+6	6	Info
+6	7	Debug
+6	8	Spew
+7	0	Disable
+7	1	Enable
+7	2	Keep
+# -----------------------------------------------------------------
+checksums
+
+checksum 392 423 984