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i#3544 riscv64: Implement some base instructions #6014

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merged 8 commits into from
May 14, 2023

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@shiptux shiptux commented Apr 28, 2023

This commit introduces the following changes:

  • Added SYSNUM_REG for RISC-V64
  • Implemented atomic_add
  • Implemented dynamorio_sigreturn
  • Implemented dynamorio_sys_exit
  • Implemented call_switch_stack

Notice: Although some base instructions have been implemented for RISC-V64, there are still many unimplemented pieces in Dynamorio for this architecture, and it cannot be tested via QEMU then.

Issue: #3544

This commit introduces the following changes:
- Added SYSNUM_REG for RISC-V64
- Implemented atomic_add
- Implemented dynamorio_sigreturn
- Implemented dynamorio_sys_exit
- Implemented call_switch_stack

Notice: Although some of the base instructions have been implemented for RISC-V64, there are still a large number of unimplemented pieces in Dynamorio for this architechture, and it cannot be tested via QEMU then.

Issue: DynamoRIO#3544
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@abhinav92003
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Also, s/instrutions/instructions/ in the PR title.

@shiptux shiptux changed the title i#3544 riscv64: Implement some base instrutions i#3544 riscv64: Implement some base instructions May 3, 2023
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shiptux commented May 3, 2023

Is SYSNUM_REG only used in aarch64? But it seems that it is defined in all arches.
https://github.com/DynamoRIO/dynamorio/blob/master/core/arch/asm_defines.asm#L133
@derekbruening @abhinav92003

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Is SYSNUM_REG only used in aarch64? But it seems that it is defined in all arches. https://github.com/DynamoRIO/dynamorio/blob/master/core/arch/asm_defines.asm#L133 @derekbruening @abhinav92003

Does seem that some of that #else part is intended only for AArch64.

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LGTM. Okay to submit after resolving the remaining comment threads.

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Is SYSNUM_REG only used in aarch64? But it seems that it is defined in all arches. https://github.com/DynamoRIO/dynamorio/blob/master/core/arch/asm_defines.asm#L133 @derekbruening @abhinav92003

Is this blocking this PR? If not, we can fix it separately; can you raise a new issue for it?

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shiptux commented May 4, 2023

Is SYSNUM_REG only used in aarch64? But it seems that it is defined in all arches. https://github.com/DynamoRIO/dynamorio/blob/master/core/arch/asm_defines.asm#L133 @derekbruening @abhinav92003

Is this blocking this PR? If not, we can fix it separately; can you raise a new issue for it?

This makes dynamorio fail to compile on RISC-V. See the CI log in this PR.

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Is SYSNUM_REG only used in aarch64? But it seems that it is defined in all arches. https://github.com/DynamoRIO/dynamorio/blob/master/core/arch/asm_defines.asm#L133 @derekbruening @abhinav92003

Is this blocking this PR? If not, we can fix it separately; can you raise a new issue for it?

This makes dynamorio fail to compile on RISC-V. See the CI log in this PR.

Oh I didn't notice that before since it's a warning asm_defines.asm:566: warning: "SYSNUM_REG" redefined that doesn't show up as a CI failure. The build failure seems to be due to a recent commit on this branch: Error: illegal operands 'ld s2 0(sp)'.

Regardless, I agree we should fix the warning. Like I said above, some of that #else part does seem targeted to only AArch64. Can you maybe add another conditional define there for now? And also move the risc-v definition to the same part of code? (We might want to refactor existing x86 code to also use a SYSNUM_REG constant to be consistent across all archs, but we can do it independently of this PR so as to not block it).

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shiptux commented May 4, 2023

Is SYSNUM_REG only used in aarch64? But it seems that it is defined in all arches. https://github.com/DynamoRIO/dynamorio/blob/master/core/arch/asm_defines.asm#L133 @derekbruening @abhinav92003

Is this blocking this PR? If not, we can fix it separately; can you raise a new issue for it?

This makes dynamorio fail to compile on RISC-V. See the CI log in this PR.

Oh I didn't notice that before since it's a warning asm_defines.asm:566: warning: "SYSNUM_REG" redefined that doesn't show up as a CI failure. The build failure seems to be due to a recent commit on this branch: Error: illegal operands 'ld s2 0(sp)'.

Regardless, I agree we should fix the warning. Like I said above, some of that #else part does seem targeted to only AArch64. Can you maybe add another conditional define there for now? And also move the risc-v definition to the same part of code? (We might want to refactor existing x86 code to also use a SYSNUM_REG constant to be consistent across all archs, but we can do it independently of this PR so as to not block it).

Ok. I fixed the CI error. It is not blocked by SYSNUM_REG.
I think move the define in another PR will be better.

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Ok. I fixed the CI error. It is not blocked by SYSNUM_REG. I think move the define in another PR will be better.

Okay. I raised #6027 for the cleanup.

@shiptux shiptux requested a review from derekbruening May 5, 2023 14:55
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Looks like @abhinav92003 already reviewed and approved: not sure why another review was requested, @shiptux ?

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shiptux commented May 5, 2023

Looks like @abhinav92003 already reviewed and approved: not sure why another review was requested, @shiptux ?

Sorry for requested that.
I saw that there have two reviewer, I mistaken for should both reviewer approval.

Sorry to bother you.

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shiptux commented May 12, 2023

@abhinav92003 @derekbruening It seems I don't have permission to merge this PR. (Need to merge by the project collaborators.) Could anyone help me?

@abhinav92003 abhinav92003 removed the request for review from derekbruening May 12, 2023 14:00
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@abhinav92003 @derekbruening It seems I don't have permission to merge this PR. (Need to merge by the project collaborators.) Could anyone help me?

I sent you an invite for Committers access to the repo. Once you accept it, you should be able to submit.

@shiptux shiptux merged commit 503ad65 into DynamoRIO:master May 14, 2023
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3 participants