i#2626: Add AARCH64 Attribute registers to the DR_REG enum #6835
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Registers like ID_AA64ISAR0_EL1 are readable at EL0 on Linux, but are not included in the DR_REG enum as this only includes EL0 registers. This means that MRS instructions that read these registers will not be disassembled in the normal way in the DR log. Issue: #2626
derekbruening
approved these changes
Jun 3, 2024
@derekbruening Thanks. I have double checked the encodings (and the patch has been internally reviewed.) |
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Registers like ID_AA64ISAR0_EL1 are readable at EL0 on Linux, but are not included in the DR_REG enum as this only includes EL0 registers.
This means that MRS instructions that read these registers will not be disassembled in the normal way in the DR log.
Issue: #2626