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Reorder block creation for while loops. #3619

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merged 5 commits into from
Dec 17, 2022
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@otrho otrho commented Dec 16, 2022

Closes #3580.

Unfortunately the register allocator is a little bit fragile and requires all register uses are listed after their definitions, regardless of topological order. When compiling while loops we have put the 'end' block before the body which could cause these sort of out of order definitions. This change ensures while bodies are between the conditional and end blocks.

Improving the allocator (perhaps including the ability for spilling) should be done after we refactor the ASM generation, in particular after we introduce SSA and basic blocks to the abstract program. Performing a true topological traversal of the ASM without BBs would be much, much harder otherwise. The ASM gen refactor is mostly covered in #2505.

@otrho otrho force-pushed the otrho/3580_uninit-register branch from f3c2e11 to 2e98d9f Compare December 16, 2022 03:20
otrho and others added 2 commits December 16, 2022 15:48
Unfortunately the register allocator depends on value uses to always
follow value definitions in the list of instructions within a function.

Until now while loops were placing the body beyond the end of loop block
which violated this requirement.

This change introduces a special 'break block' to allow the while loop
blocks to be in top-to-bottom order again.  This break block is then
mostly optimised away with `simplify-cfg`.
@otrho otrho force-pushed the otrho/3580_uninit-register branch 2 times, most recently from 5875519 to f9697b8 Compare December 16, 2022 05:35
A common problem with the deployed contract E2E tests is when the
bytecode for a contract changes its hash and therefore its contract ID
changes.  These need to be updated in the source of the test depending
on the deployed contract.

This change is more verbose when there is a panic or revert for these
tests, to print the deployed contract IDs and the receipts which will
confirm a `ContractNotInInputs` error.
@otrho otrho force-pushed the otrho/3580_uninit-register branch from f9697b8 to ee5e0d0 Compare December 16, 2022 05:36
@otrho otrho requested a review from a team December 16, 2022 05:53
@otrho otrho marked this pull request as ready for review December 16, 2022 05:53
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otrho commented Dec 16, 2022

The new 'break' blocks will disappear with simplify-cfg either deleting them or possibly merging them.

I've also snuck in a couple of other changes -- Vaivas improved the inliner, I added a little check in the IR verifier which caught a bug at some point, plus an update to the E2E test harness to make it easier to fix the hard coded contract IDs when they go bad.

@otrho otrho requested a review from a team December 16, 2022 05:59
@otrho otrho enabled auto-merge (squash) December 16, 2022 06:29
@mohammadfawaz mohammadfawaz added bug Something isn't working P: critical Should be looked at before anything else compiler: codegen Everything to do with IR->ASM, register allocation, etc. labels Dec 17, 2022
@otrho otrho merged commit c511ccd into master Dec 17, 2022
@otrho otrho deleted the otrho/3580_uninit-register branch December 17, 2022 19:25
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Internal compiler error: Program erroneously uses uninitialized virtual registers.
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