scu4slim: initial

Makefile

@@ -48,6 +48,7 @@ CHECK_PEXARRIA10       = ./syn/gsi_pexarria10/control/pexarria10
 CHECK_FTM10            = ./syn/gsi_pexarria10/ftm10/ftm10
 CHECK_A10GX            = ./syn/gsi_a10gx_pcie/control/pci_control
 CHECK_IDROGEN          = ./syn/in2p3_idrogen/control/idrogen
+CHECK_SCU4SLIM         = ./syn/gsi_scu/slim4/scu4slim
 
 # Project paths
 PATH_SCU2              = syn/gsi_scu/control2
@@ -69,6 +70,7 @@ PATH_PEXARRIA10        = syn/gsi_pexarria10/control
 PATH_FTM10             = syn/gsi_pexarria10/ftm10
 PATH_A10GX             = syn/gsi_a10gx_pcie/control
 PATH_IDROGEN           = syn/in2p3_idrogen/control
+PATH_SCU4SLIM          = syn/gsi_scu/slim4
 
 define sort_file
 	sort $(1).qsf >> temp_sorted
@@ -437,6 +439,18 @@ ftm10-sort:
 ftm10-check:
 	$(call check_timing, $(CHECK_FTM10))
 
+scu4slim:		firmware
+	$(MAKE) -C $(PATH_SCU4SLIM) all
+
+scu4slim-sort:
+	$(call sort_file, $(CHECK_SCU4SLIM))
+
+scu4slim-check:
+	$(call check_timing, $(CHECK_SCU4SLIM))
+
+scu4slim-clean::
+	$(MAKE) -C $(PATH_SCU4SLIM) clean
+
 # #################################################################################################
 # SCU slaves
 # #################################################################################################
@@ -476,7 +490,7 @@ blm:		firmware
 
 blm-clean::
 	$(MAKE) -C syn/blm_aco clean
-	
+
 # #################################################################################################
 # LM32 firmware
 # #################################################################################################

syn/gsi_scu/slim4/Makefile

@@ -0,0 +1,8 @@
+TARGET		= scu4slim
+DEVICE		= 10AX027E3
+FLASH		= MT25QU512
+SPI_LANES	= ASx4
+RAM_SIZE	= 262144
+ARRIA10_JIC	= yes
+
+include ../../build.mk

syn/gsi_scu/slim4/Manifest.py

@@ -0,0 +1,19 @@
+target = "altera"
+action = "synthesis"
+
+fetchto = "../../../ip_cores"
+syn_tool = "quartus"
+syn_grade = "e2sg"
+syn_package = "29"
+syn_device = "10ax027e3f"
+syn_top = "scu4slim"
+syn_project = "scu4slim"
+syn_family = "Arria 10"
+
+quartus_preflow = "scu4slim.tcl"
+
+modules = {
+  "local" : [
+    "../../../top/gsi_scu/slim4",
+  ]
+}

syn/gsi_scu/slim4/quartus.ini

@@ -0,0 +1 @@
+pgm_allow_mt25q=on

syn/gsi_scu/slim4/scu4slim.qpf

@@ -0,0 +1 @@
+PROJECT_REVISION = "scu4slim"

syn/gsi_scu/slim4/scu4slim.tcl

@@ -0,0 +1,11 @@
+set platform "scu4slim"
+source ../../autogen.tcl
+source ../../../modules/build_id/build_id.tcl
+source ../../../ip_cores/general-cores/platform/altera/networks/arria10gx/arria10gx.tcl
+source ../../../ip_cores/general-cores/platform/altera/wb_pcie/arria10gx_scu4.tcl
+source ../../../modules/pll/arria10_scu4/arria10_scu4_pll.tcl
+source ../../../ip_cores/wr-cores/platform/altera/wr_arria10_phy/wr_arria10_scu4_phy/wr_arria10_scu4_phy.tcl
+source ../../../modules/lvds/arria10_scu4/arria10_scu4_lvds.tcl
+source ../../../modules/remote_update/asmi10.tcl
+source ../../../modules/wb_arria_reset/arria10_reset.tcl
+source ../../../modules/a10ts/src/hdl/a10ts_generate.tcl

top/gsi_scu/slim4/Manifest.py

@@ -0,0 +1,11 @@
+files = [
+   "scu4slim.vhd",
+   "ramsize_pkg.vhd",
+   "../../common/arria10.sdc",
+]
+
+modules = {
+  "local" : [
+    "../../..",
+  ]
+}

top/gsi_scu/slim4/ramsize_pkg.vhd

@@ -0,0 +1,8 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+library work;
+package ramsize_pkg is
+  constant c_lm32_ramsizes : natural := 262144;
+end ramsize_pkg;