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Output pins that are always connected must be stacked for best ERC results. Stacked ground pins in sensible groupings. Ensured at one pin of every signal is still on the same position as before.
Changing the pin types got rid of the original ERC error. But hiding pins has a problem. Each pair of pins are there to handle larger currents. If you hide them, the user can not use them by default. For example, I changed all pin types here and hidden one of the AO1 pin (pin 2). Then the PCB layout will show, Now obviously the pin 2 is not connected to anything. |
Check the symbol i made! It is different to what you did. I did not hide the pins i stacked them. See https://www.kicad-pcb.org/libraries/klc/S4.3/ and of course https://forum.kicad.info/t/electrical-type-of-schematic-symbol-pins/9439 |
Got it! Thanks. |
Hello @poeschlr thanks for this enhancements The modifications are breaking the design of schematic so it will be for v6. Else no comment on the modifications done to stack the pins. Joel |
@myfreescalewebpage @poeschlr |
It's right! |
Output pins that are always connected must be stacked for best ERC
results.
Stacked ground pins in sensible groupings.
Ensured at one pin of every signal is still on the same position as
before.
https://toshiba.semicon-storage.com/info/docget.jsp?did=10660&prodName=TB6612FNG
https://forum.kicad.info/t/conflict-problem-between-pins-severity-error-yet-again/22521
I could imagine that all power ground pins could be stacked. The datasheet is quite bad for this part so i can not really tell. Similarly with VM2 and VM3 possibly also VM1