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Faster execution and a new pseudo-instruction #273

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merged 9 commits into from
Aug 11, 2018

Commits on Mar 22, 2018

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Commits on Mar 26, 2018

  1. Add RTL step to fetch cycle, going through MBR instead of directly to…

    … IR (consistent with textbook). Change ALU control signals to be consistent with textbook. Change control signals in SkipCond to reflect the PC increment step rather than the ALU test.
    guidotack committed Mar 26, 2018
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Commits on Aug 3, 2018

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Commits on Aug 10, 2018

  1. Make multiple iterations per loop if delay < 10 ms (otherwise default…

    … delay of 10ms is used, makes some programs far too slow)
    guidotack committed Aug 10, 2018
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  2. Add new pseudo-instruction ADR, which is a synonym for JnS

    Can be used to load the address of a label (less confusing than abusing JnS for that purpose)
    guidotack committed Aug 10, 2018
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  3. Actually use realDelay

    guidotack authored Aug 10, 2018
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  4. Add break to placate travis

    guidotack committed Aug 10, 2018
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