patina_debugger/x64: Fix FPU and ST register index calculation #1154
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Correct the register ID offset calculation for FPU (registers 29-35) and ST (registers 36-44) to properly map to array indices 0-6 and 0-8 respectively. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
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Noticed in pre-existing code while reviewing #1151. |
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os-d
approved these changes
Dec 4, 2025
cfernald
approved these changes
Dec 4, 2025
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Description
Correct the register ID offset calculation for FPU (registers 29-35) and ST (registers 36-44) to properly map to array indices 0-6 and 0-8 respectively.
How This Was Tested
cargo make allIntegration Instructions