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Allow QuantumCircuit construction with zero qubit or clbit count (#6800)
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* allow circuits with zero classical registers to be constructed

* add test

* fix typo

* trigger build

* allow quantum register of size zero; add unit tests

* trigger build

* address review comments

* fix tests; revert special case for 0 classical registers

* add test

* fix tests

Co-authored-by: Pieter Eendebak <P.T.eendebak@tudelft.nl>
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eendebakpt and peendebak authored Aug 22, 2021
1 parent fd921b8 commit 1e27e83
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Showing 4 changed files with 37 additions and 4 deletions.
15 changes: 13 additions & 2 deletions qiskit/circuit/quantumcircuit.py
Original file line number Diff line number Diff line change
Expand Up @@ -1250,10 +1250,21 @@ def add_register(self, *regs: Union[Register, int, Sequence[Bit]]) -> None:
# QuantumCircuit defined without registers
if len(regs) == 1 and isinstance(regs[0], int):
# QuantumCircuit with anonymous quantum wires e.g. QuantumCircuit(2)
regs = (QuantumRegister(regs[0], "q"),)
if regs[0] == 0:
regs = tuple()
else:
regs = (QuantumRegister(regs[0], "q"),)
elif len(regs) == 2 and all(isinstance(reg, int) for reg in regs):
# QuantumCircuit with anonymous wires e.g. QuantumCircuit(2, 3)
regs = (QuantumRegister(regs[0], "q"), ClassicalRegister(regs[1], "c"))
if regs[0] == 0:
qregs = tuple()
else:
qregs = (QuantumRegister(regs[0], "q"),)
if regs[1] == 0:
cregs = tuple()
else:
cregs = (ClassicalRegister(regs[1], "c"),)
regs = qregs + cregs
else:
raise CircuitError(
"QuantumCircuit parameters can be Registers or Integers."
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4 changes: 2 additions & 2 deletions qiskit/circuit/register.py
Original file line number Diff line number Diff line change
Expand Up @@ -82,9 +82,9 @@ def __init__(self, size=None, name=None, bits=None):
)
size = int(size) # cast to int

if size <= 0:
if size < 0:
raise CircuitError(
"Register size must be positive (%s '%s' was provided)"
"Register size must be non-negative (%s '%s' was provided)"
% (type(size).__name__, size)
)

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12 changes: 12 additions & 0 deletions test/python/circuit/test_circuit_registers.py
Original file line number Diff line number Diff line change
Expand Up @@ -148,6 +148,18 @@ def test_qubits(self):
self.assertEqual(qubits[1], qr2[1])
self.assertEqual(qubits[2], qr1[0])

def test_circuit_without_classical_register(self):
"""Test QuantumCircuit constructor."""
qc = QuantumCircuit(2, 0)
self.assertEqual(qc.cregs, [])

def test_circuit_without_quantum_register(self):
"""Test QuantumCircuit constructor."""
qc = QuantumCircuit(0, 3)
self.assertEqual(qc.qregs, [])
self.assertEqual(len(qc.cregs), 1)
self.assertEqual(qc.cregs[0].size, 3)

def test_clbits(self):
"""Test clbits() method."""
qr1 = QuantumRegister(1, "q1")
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10 changes: 10 additions & 0 deletions test/python/circuit/test_register.py
Original file line number Diff line number Diff line change
Expand Up @@ -51,6 +51,16 @@ def test_init_raise_if_passed_invalid_name(self, reg_type):
with self.assertRaisesRegex(CircuitError, "invalid OPENQASM register name"):
_ = reg_type(size=1, name="_q")

@data(QuantumRegister, ClassicalRegister, AncillaRegister)
def test_init_with_zero_size(self, reg_type):
register = reg_type(0)
self.assertEqual(register.size, 0)

@data(QuantumRegister, ClassicalRegister, AncillaRegister)
def test_init_raise_if_negative_size(self, reg_type):
with self.assertRaisesRegex(CircuitError, "Register size must be non-negative"):
_ = reg_type(-1)

@data(QuantumRegister, ClassicalRegister, AncillaRegister)
def test_implicit_bit_construction_from_size(self, reg_type):
reg = reg_type(2)
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