Fix for conditional single gate plotting using mpl

[paniash]

Summary

Fixes #7017. Minor bug fix involving plotting of QuantumCircuit object when using conditional single gates like circuit.h(0).c_if(0, True).

[1ucian0]

This is an unexpectedly short fix :)

Does it make sense @TharrmashasthaPV and @enavarro51 ?

[enavarro51]

Probably need @TharrmashasthaPV to weigh in, but isn't this what #6259 fixes? (Which got stuck in CI, by the way).

[1ucian0]

@paniash do you mind adding a test?

[TharrmashasthaPV]

Hey. I am just not sure if this is a complete fix. Because for one, the circuit

q = QuantumRegister(1,'q')
c = ClassicalRegister(2,'c')
circuit = QuantumCircuit(q, c)
circuit.h(0).c_if(1, True)
circuit.h(0).c_if(0, True)
circuit.draw('mpl')

outputs

The label is 0x1 irrespective of the bit the gate is conditioned on. Also, circuit.draw('mpl', cregbundle=False) breaks and if a gate is conditioned on a complete register like circuit.x(0).c_if(c,1), the drawer breaks.

[paniash]

@TharrmashasthaPV Thanks for pointing it out. Can you confirm if this issue is fixed in #6259? If so, then I'll close this PR.

[1ucian0]

Which got stuck in CI, by the way

Ups.. unblocking this.

[1ucian0]

#6259 merged. That seems to solve #7017. If #6259 is incomplete and this PR is the way to go, please reopen it.