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Add tags to all instructions also make them to clearly express their purpose #9

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Add tags to all instructions also make them to clearly express their purpose #9

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46750ee
Use separators, not spaces, between operands
ThinkOpenly Oct 28, 2023
8a53dd0
added extension function and checks for A and C extension
Sanket-0510 Jan 20, 2024
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22 changes: 13 additions & 9 deletions model/riscv_insts_aext.sail
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Original file line number Diff line number Diff line change
Expand Up @@ -74,6 +74,10 @@
/* ****************************************************************** */
// Some print utils for lr/sc.


include "riscv_insts_helper.sail"


function aqrl_str(aq : bool, rl : bool) -> string =
match (aq, rl) {
(false, false) => "",
Expand Down Expand Up @@ -105,7 +109,7 @@ function amo_width_valid(size : word_width) -> bool = {
/* ****************************************************************** */
union clause ast = LOADRES : (bool, bool, regidx, word_width, regidx)

mapping clause encdec = LOADRES(aq, rl, rs1, size, rd) if amo_width_valid(size)
mapping clause encdec = LOADRES(aq, rl, rs1, size, rd) if extension("A") & amo_width_valid(size)
<-> 0b00010 @ bool_bits(aq) @ bool_bits(rl) @ 0b00000 @ rs1 @ 0b0 @ size_bits(size) @ rd @ 0b0101111 if amo_width_valid(size)


Expand All @@ -123,7 +127,7 @@ function process_loadres(rd, addr, value, is_unsigned) =
}

function clause execute(LOADRES(aq, rl, rs1, width, rd)) = {
if haveAtomics() then {
if extension("A") then {
/* Get the address, X(rs1) (no offset).
* Extensions might perform additional checks on address validity.
*/
Expand Down Expand Up @@ -164,14 +168,14 @@ function clause execute(LOADRES(aq, rl, rs1, width, rd)) = {
}
}

mapping clause assembly = LOADRES(aq, rl, rs1, size, rd)
mapping clause assembly = LOADRES(aq, rl, rs1, size, rd) if extension("A")
<-> "lr." ^ size_mnemonic(size) ^ maybe_aq(aq) ^ maybe_rl(rl) ^ spc() ^ reg_name(rd) ^ sep() ^ reg_name(rs1)

/* ****************************************************************** */
union clause ast = STORECON : (bool, bool, regidx, regidx, word_width, regidx)

mapping clause encdec = STORECON(aq, rl, rs2, rs1, size, rd) if amo_width_valid(size)
<-> 0b00011 @ bool_bits(aq) @ bool_bits(rl) @ rs2 @ rs1 @ 0b0 @ size_bits(size) @ rd @ 0b0101111 if amo_width_valid(size)
mapping clause encdec = STORECON(aq, rl, rs2, rs1, size, rd) if extension("A") & amo_width_valid(size)
<-> 0b00011 @ bool_bits(aq) @ bool_bits(rl) @ rs2 @ rs1 @ 0b0 @ size_bits(size) @ rd @ 0b0101111 if extension("A") & amo_width_valid(size)

/* NOTE: Currently, we only EA if address translation is successful. This may need revisiting. */
function clause execute (STORECON(aq, rl, rs2, rs1, width, rd)) = {
Expand All @@ -181,7 +185,7 @@ function clause execute (STORECON(aq, rl, rs2, rs1, width, rd)) = {
*/
X(rd) = zero_extend(0b1); RETIRE_SUCCESS
} else {
if haveAtomics() then {
if extension("A") then {
/* normal non-rmem case
* rmem: SC is allowed to succeed (but might fail later)
*/
Expand Down Expand Up @@ -250,7 +254,7 @@ function clause execute (STORECON(aq, rl, rs2, rs1, width, rd)) = {
}
}

mapping clause assembly = STORECON(aq, rl, rs2, rs1, size, rd)
mapping clause assembly = STORECON(aq, rl, rs2, rs1, size, rd) if extension("A") &
<-> "sc." ^ size_mnemonic(size) ^ maybe_aq(aq) ^ maybe_rl(rl) ^ spc() ^ reg_name(rd) ^ sep() ^ reg_name(rs1) ^ sep() ^ reg_name(rs2)

/* ****************************************************************** */
Expand All @@ -274,7 +278,7 @@ mapping clause encdec = AMO(op, aq, rl, rs2, rs1, size, rd) if amo_width_valid(s
/* NOTE: Currently, we only EA if address translation is successful.
This may need revisiting. */
function clause execute (AMO(op, aq, rl, rs2, rs1, width, rd)) = {
if haveAtomics() then {
if extension("A") then {
/* Get the address, X(rs1) (no offset).
* Some extensions perform additional checks on address validity.
*/
Expand Down Expand Up @@ -375,5 +379,5 @@ mapping amo_mnemonic : amoop <-> string = {
AMOMAXU <-> "amomaxu"
}

mapping clause assembly = AMO(op, aq, rl, rs2, rs1, width, rd)
mapping clause assembly = AMO(op, aq, rl, rs2, rs1, width, rd) if extension("A")
<-> amo_mnemonic(op) ^ "." ^ size_mnemonic(width) ^ maybe_aq(aq) ^ maybe_rl(rl) ^ spc() ^ reg_name(rd) ^ sep() ^ reg_name(rs2) ^ sep() ^ "(" ^ reg_name(rs1) ^ ")"
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