Examples. Describe the Tangnano4k clock pin. #234
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The point is that the external crystal on this board is soldered to a pin, which is a PLL input, not a clock pin. Therefore, common routing is used. By specifying that this is a buffered network, we are forcing the router to use global clock wires. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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The fact that the network has become buffered may have a very minor effect in cases where you really need to use this pin as an input for a PLL. For now we can simply remove CLOCK_LOC "clk" BUFG, but in the future we will need to make a small correction to our global router to catch PLL input pins. |
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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Also runber, let's wait YosysHQ/nextpnr#1286 |
pepijndevos
approved these changes
Feb 4, 2024
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The point is that the external crystal on this board is soldered to a pin, which is a PLL input, not a clock pin. Therefore, common routing is used.
By specifying that this is a buffered network, we are forcing the router to use global clock wires.