Infer static timing extensions

[tedbauer]

Our infer-static-timing pass tries to statically infer the number of cycles a group will take to execute, and if it succeeds, it annotates the group with that number with a "static" attribute. It currently only works when every done signal in the group is written to by single go signals. For example, this group will be annotated with "static"=2:

// r0 and r1 are registers
group a {
  r0.in = 1'd1;
  r0.write_en = 1'd1;
  r1.in = d'1;
  r1.write_end = r0.done;
  a[done] = r1.done;
}

The pass conservatively gives up and leaves no annotation if there are more complex expressions that write to a done port, like this program, even if we could still statically infer the latency:

// r0 and r1 are registers
group a {
  r0.in = 1'd1;
  r0.write_en = 1'd1;
  r1.in = d'1;
  r1.write_end = r0.done;
  a[done] = r1.done ? 1'd1;
}

This issue is for identifying more cases where we can statically infer the latency, and implementing support for those cases.

[rachitnigam]

Once #311 is done, this pass should also add "static" annotations on components and use that information during static-timing.