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Clippy fix and fmt
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swenson committed Feb 5, 2025
1 parent 27e5615 commit 9aacda2
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Showing 3 changed files with 18 additions and 23 deletions.
35 changes: 15 additions & 20 deletions sw-emulator/lib/periph/src/dma/axi_root_bus.rs
Original file line number Diff line number Diff line change
Expand Up @@ -61,10 +61,7 @@ impl AxiRootBus {
}

pub fn must_schedule(&mut self, addr: AxiAddr) -> bool {
match addr {
Self::MCU_SRAM_OFFSET..=Self::MCU_SRAM_END => true,
_ => false,
}
matches!(addr, Self::MCU_SRAM_OFFSET..=Self::MCU_SRAM_END)
}

pub fn schedule_read(&mut self, addr: AxiAddr, len: u32) -> Result<(), BusError> {
Expand All @@ -74,7 +71,7 @@ impl AxiRootBus {
}
match addr {
Self::MCU_SRAM_OFFSET..=Self::MCU_SRAM_END => {
self.event_sender.as_mut().map(|sender| {
if let Some(sender) = self.event_sender.as_mut() {
sender
.send(Event::new(
Device::CaliptraCore,
Expand All @@ -85,7 +82,7 @@ impl AxiRootBus {
},
))
.unwrap();
});
}
Ok(())
}
_ => Err(BusError::LoadAccessFault),
Expand All @@ -111,13 +108,13 @@ impl AxiRootBus {

pub fn write(&mut self, size: RvSize, addr: AxiAddr, val: RvData) -> Result<(), BusError> {
match addr {
Self::TEST_REG_OFFSET => return Register::write(&mut self.reg, size, val),
Self::TEST_REG_OFFSET => Register::write(&mut self.reg, size, val),
Self::RECOVERY_REGISTER_INTERFACE_OFFSET..=Self::RECOVERY_REGISTER_INTERFACE_END => {
let addr = (addr - Self::RECOVERY_REGISTER_INTERFACE_OFFSET) as RvAddr;
Bus::write(&mut self.recovery, size, addr, val)
}
Self::MCU_SRAM_OFFSET..=Self::MCU_SRAM_END => {
self.event_sender.as_mut().map(|sender| {
if let Some(sender) = self.event_sender.as_mut() {
sender
.send(Event::new(
Device::CaliptraCore,
Expand All @@ -128,30 +125,28 @@ impl AxiRootBus {
},
))
.unwrap();
});
}
Ok(())
}
Self::OTC_FC_OFFSET..=Self::OTC_FC_END => {
let addr = (addr - Self::OTC_FC_OFFSET) as RvAddr;
return Bus::write(&mut self.otp_fc, size, addr, val);
Bus::write(&mut self.otp_fc, size, addr, val)
}
_ => Err(StoreAccessFault),
}
}

pub fn incoming_event(&mut self, event: Rc<Event>) {
self.recovery.incoming_event(event.clone());
match &event.event {
EventData::MemoryReadResponse {
start_addr: _,
data,
} => {
// we only access read responses from the MCU
if event.src == Device::MCU {
self.dma_result = Some(data.clone());
}
if let EventData::MemoryReadResponse {
start_addr: _,
data,
} = &event.event
{
// we only access read responses from the MCU
if event.src == Device::MCU {
self.dma_result = Some(data.clone());
}
_ => {}
}
}

Expand Down
2 changes: 1 addition & 1 deletion sw-emulator/lib/periph/src/dma/recovery.rs
Original file line number Diff line number Diff line change
Expand Up @@ -409,7 +409,7 @@ impl RecoveryRegisterInterface {
fn to_payload(data: &[u32], len: usize) -> Option<Vec<u8>> {
Some(
data.iter()
.flat_map(|x| x.to_le_bytes().iter().copied().collect::<Vec<u8>>())
.flat_map(|x| x.to_le_bytes().to_vec())
.take(len)
.collect(),
)
Expand Down
4 changes: 2 additions & 2 deletions sw-emulator/lib/periph/src/root_bus.rs
Original file line number Diff line number Diff line change
Expand Up @@ -385,7 +385,7 @@ impl CaliptraRootBus {
self.sha512_acc.incoming_event(event.clone());
self.dma.incoming_event(event.clone());
self.csrng.incoming_event(event.clone());
self.pic_regs.incoming_event(event.clone());
self.pic_regs.incoming_event(event);
}

fn register_outgoing_events(&mut self, sender: mpsc::Sender<Event>) {
Expand All @@ -408,7 +408,7 @@ impl CaliptraRootBus {
self.sha512_acc.register_outgoing_events(sender.clone());
self.dma.register_outgoing_events(sender.clone());
self.csrng.register_outgoing_events(sender.clone());
self.pic_regs.register_outgoing_events(sender.clone());
self.pic_regs.register_outgoing_events(sender);
}
}

Expand Down

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