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New enhanced API for specifying Chisel to Firrtl Annotations #2628
New enhanced API for specifying Chisel to Firrtl Annotations #2628
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Can you fill out the template, especially in the Release notes say that you added a new API for Converting a single Chisel Annotation to a Sequence of FIRRTL annotations? |
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Shouldn't there be something when we do Convert to FIRRTL that actually looks at these newAnnotations?
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Generally looks good. Some ideas/suggestions throughout.
annotations: Seq[ChiselAnnotation], | ||
renames: RenameMap, | ||
newAnnotations: Seq[ChiselToFirrtlAnnotations] = Seq.empty) { |
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Adding fields to case classes is both a binary incompatible and source incompatible change. This would not be an issue if we had properly made all of these classes private.... but we didn't and some users do notice.
To safely backport this to 3.5.x (which I presume is your plan) we either need to use dataclass to give case class-like behavior in a more friendly way for making modifications like this, or we need to add these new arguments to a 2nd parameter list and implement equals and hashcode ourselves.
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@jackkoenig let me explore that - I am assuming since the annotations
val is publicly visible - the change suggested by @seldridge to make annotations
Seq[ChiselToFirrtlAnnotations]
instead of Seq[ChiselAnnotation]
also is disruptive?
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@jackkoenig please take a look - have used dataclass - however not sure if I have handled copy properly (also do we need an unapply method? )
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Copy should exclude any new methods (any after @since
), also please add "Chisel 3.5.4"
to the since just to make it obvious. You also do need to define unapply. To check if your changes are binary compatible, you can try making them against 3.5.x and then running sbt +mimaReportBinaryIncompatibilities
See https://github.com/chipsalliance/firrtl/blob/c7403e80f965aa3c6f65b176dbb56dbb905cbb31/src/main/scala/firrtl/ir/IR.scala#L769 for example of the copy not having any new fields and of implementing unapply yourself (again not including the new fields).
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@jackkoenig did what you suggested - and I am seeing similar errors as mentioned in the PR you linked after my update - can these be ignored?
error] chisel3-core: Failed binary compatibility check against edu.berkeley.cs:chisel3-core_2.12:3.5.3! Found 4 potential problems (filtered 8)
[error] * class chisel3.internal.firrtl.Circuit is declared final in current version
[error] filter with: ProblemFilters.exclude[FinalClassProblem]("chisel3.internal.firrtl.Circuit")
[error] * static method tupled()scala.Function1 in class chisel3.internal.firrtl.Circuit does not have a correspondent in current version
[error] filter with: ProblemFilters.exclude[DirectMissingMethodProblem]("chisel3.internal.firrtl.Circuit.tupled")
[error] * static method curried()scala.Function1 in class chisel3.internal.firrtl.Circuit does not have a correspondent in current version
[error] filter with: ProblemFilters.exclude[DirectMissingMethodProblem]("chisel3.internal.firrtl.Circuit.curried")
[error] * the type hierarchy of object chisel3.internal.firrtl.Circuit is different in current version. Missing types {scala.runtime.AbstractFunction4}
[error] filter with: ProblemFilters.exclude[MissingTypesProblem]("chisel3.internal.firrtl.Circuit$")
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@jackkoenig have incorporated your changes to resolve the compatibility issues - the check is still running locally - and so far so good - will update once it ends (hopefully passes).
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It passed!
sbt +mimaReportBinaryIssues
....
[success] Total time: 22 s, completed Jul 13, 2022 11:25:27 AM
[info] Setting Scala version to 2.13.7 on 6 projects.
[info] Reapplying settings...
[info] set current project to chisel3 (in build file:/scratch/girishp/vscode/clone_23jun/federation/rocket-chip/chisel3/)
[success] Total time: 0 s, completed Jul 13, 2022 11:25:28 AM
[info] Setting Scala version to 2.13.8 on 6 projects.
[info] Reapplying settings...
[info] set current project to chisel3 (in build file:/scratch/girishp/vscode/clone_23jun/federation/rocket-chip/chisel3/)
[success] Total time: 0 s, completed Jul 13, 2022 11:25:29 AM
[info] Reapplying settings...
[info] set current project to chisel3 (in build file:/scratch/girishp/vscode/clone_23jun/federation/rocket-chip/chisel3/)
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This is on 3.5.x ....
(cherry picked from commit 4b10cf7)
Contributor Checklist
docs/src
?Type of Improvement
High level Changes
ChiselMultiAnnotaiton
was created withtoFirrtl
method - which returns a Seq of Annotations.@jackkoenig this is based on our agreed upon strategy (creating a totally new trait as opposed to adding a new method in the existing one)
API Impact
No impact to current code. The current API is useful to generate annotations containing information which will only be available after a module elaborates. However this is limited since we can only generate a single annotation per call. In some cases we need ability to generate a Seq of annotations.
Backend Code Generation Impact
No change to generated verilog.
Desired Merge Strategy
Release Notes
New API to convert a single
Chisel Annotation
into a Seq ofFirrtlAnnotations
Reviewer Checklist (only modified by reviewer)
3.4.x
, [small] API extension:3.5.x
, API modification or big change:3.6.0
)?Enable auto-merge (squash)
, clean up the commit message, and label withPlease Merge
.Create a merge commit
.