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Add recursive
Bundle
and genericData
equality (===) #2669Add recursive
Bundle
and genericData
equality (===) #2669Changes from 1 commit
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I think comparing DontCare should not be possible. We do not want these two versions of code to (silently) have different behavior:
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Absolutely agreed, but the behavior of the two actually is the same, both will give
true
. Here's a Scastie illustrating the behavior:This gives the following FIRRTL
And the following Verilog:
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I'm not sure this is a good thing, but it is consistent.
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As annoying as it is, comparing two invalidated wires should return true. A lot of Chisel code intentionally or unintentionally assumes that invalid is zero in certain contexts. This is documented in CIRCT. I would love to change this, but it would be very difficult at this point. I do think defining a new concept of poison and seeing where that goes is tractable.
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But beyond the scope of this PR for sure 🙂
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The ambiguity around
DontCare === 0.U
is why I feel like making them uncomparable by generating an elaboration time error might be the best solution here.There was a problem hiding this comment.
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I agree that the ambiguity is a problem, but is it a better outcome that the following would fail:
But this would not?
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I don't think two different calls to
DontCare
should be equal. That is not what happens in thefirrtl
if you did not check in the frontend.