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chipsalliance / chisel Public

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Add modulePorts and fullModulePorts in DataMirror for Instance#4076

Merged

jackkoenig merged 7 commits intomainchipsalliance/chisel:mainfrom inst-portschipsalliance/chisel:inst-portsCopy head branch name to clipboard

May 22, 2024

+61-2

Conversation Commits7 (7)Checks Files changed

Commits

Commits on May 21, 2024

adding fulModulePorts in DataMirror for Instance
debs-sifive
committed
fix scaladoc
debs-sifive
committed
add modulePorts method
debs-sifive
committed
test showing difference between modulePorts and fullModulePorts
debs-sifive
committed
unlink scaladoc
debs-sifive
committed
test fixes
debs-sifive
committed
scaladoc fixes
debs-sifive
committed

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