add netv2 default hardware design

Signed-off-by: Wojciech Tatarski <wtatarski@antmicro.com>
chipsalliance · Apr 28, 2020 · 3dad0c0 · 3dad0c0
1 parent 5cadbc7
commit 3dad0c0
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diff --git a/project/netv2-fpga.json b/project/netv2-fpga.json
@@ -0,0 +1,21 @@
+{
+    "srcs": [
+	"src/netv2-fpga/i2c_snoop.v",
+	"src/netv2-fpga/hdcp_block.v",
+	"src/netv2-fpga/diff_network.v",
+	"src/netv2-fpga/top.v",
+	"src/netv2-fpga/shuffle_network.v",
+	"src/netv2-fpga/hdcp_cipher.v",
+	"src/netv2-fpga/hdcp_lfsr.v",
+	"src/netv2-fpga/VexRiscv-Debug.v",
+	"src/netv2-fpga/hdcp_mod.v"
+        ],
+    "top": "top",
+    "name": "netv2-fpga",
+    "data": [
+        "src/netv2-fpga/mem.init",
+        "src/netv2-fpga/edid_mem_1.init",
+        "src/netv2-fpga/mem_2.init",
+        "src/netv2-fpga/edid_mem.init"
+    ]
+}