fix for chipsalliance/rocket-chip#2841

build.sc

@@ -64,6 +64,7 @@ object myfirrtl extends dependencies.firrtl.build.firrtlCrossModule(ivys.sv) {
   )
   override val checkSystemAntlr4Version = false
   override val checkSystemProtocVersion = false
+  override val protocVersion = "3.19.2"
 }
 
 object mychisel3 extends dependencies.chisel3.build.chisel3CrossModule(ivys.sv) {
@@ -143,24 +144,6 @@ object mychiseltest extends dependencies.`chisel-testers2`.build.chiseltestCross
   def treadleModule: Option[PublishModule] = Some(mytreadle)
 }
 
-object iotesters extends CommonModule with SbtModule {
-  override def millSourcePath = os.pwd /  "dependencies" / "chisel-testers"
-
-  override def ivyDeps = Agg(
-    ivys.scalatest,
-    ivys.scalatestplus,
-    ivys.scalacheck,
-    ivys.scopt
- )
-
-  override def moduleDeps = super.moduleDeps ++ Seq(mytreadle)
-
-  object test extends Tests {
-    def testFramework = "org.scalatest.tools.Framework"
-  }
-
-}
-
 object myhardfloat extends dependencies.`berkeley-hardfloat`.build.hardfloat {
   override def millSourcePath = os.pwd /  "dependencies" / "berkeley-hardfloat"
 
@@ -257,8 +240,6 @@ object barstools extends CommonModule with SbtModule { bt =>
 object dsptools extends CommonModule with SbtModule { dt =>
   override def millSourcePath = os.pwd / "dependencies" / "dsptools"
 
-  override def moduleDeps = super.moduleDeps ++ Seq(iotesters)
-
   override def ivyDeps = Agg(
     ivys.spire,
     ivys.breeze
@@ -399,7 +380,7 @@ object spike extends Module {
   // ask make to cache file.
   def compile = T.persistent {
     os.proc(millSourcePath / "configure", "--prefix", "/usr").call(
-      T.ctx.dest, Map("CC" -> "clang", "CXX" -> "clang++")
+      T.ctx.dest, Map("CC" -> "clang", "CXX" -> "clang++", "LD" -> "ldd")
     )
     os.proc("make", "-j", Runtime.getRuntime().availableProcessors()).call(T.ctx.dest)
     T.ctx.dest

readme.md

@@ -85,18 +85,20 @@ testchipip https://github.com/ucb-bar/testchipip/pull/137
 rocket-dsp-utils https://github.com/ucb-bar/rocket-dsp-utils/pull/4  
 rocket-chip https://github.com/chipsalliance/rocket-chip/pull/2889  
 riscv-boom https://github.com/riscv-boom/riscv-boom/pull/565  
-dsptools https://github.com/ucb-bar/dsptools/pull/237  
-berkeley-hardfloat https://github.com/ucb-bar/berkeley-hardfloat/pull/60  
+riscv-boom https://github.com/riscv-boom/riscv-boom/pull/587  
 icenet https://github.com/firesim/icenet/pull/32  
 firesim https://github.com/firesim/firesim/pull/843  
 hwacha https://github.com/ucb-bar/hwacha/pull/33  
 chipyard https://github.com/ucb-bar/chipyard/pull/1001  
-riscv-sodor https://github.com/ucb-bar/riscv-sodor/pull/67  
+chipyard https://github.com/ucb-bar/chipyard/pull/1076
 gemmini https://github.com/ucb-bar/gemmini/pull/150  
 rocket-chip https://github.com/chipsalliance/rocket-chip/pull/2890  
-dsptools https://github.com/ucb-bar/dsptools/pull/240  
 rocket-dsp-utils https://github.com/ucb-bar/rocket-dsp-utils/pull/6  
 sha3 https://github.com/ucb-bar/sha3/pull/33  
+riscv-sodor https://github.com/ucb-bar/riscv-sodor/pull/69
+dsptools https://github.com/ucb-bar/dsptools/pull/240
+cva6-wrapper https://github.com/ucb-bar/cva6-wrapper/pull/13
+ibex-wrapper https://github.com/ucb-bar/ibex-wrapper/pull/1
 <!-- END-PATCH -->
 
 ## Why not Chipyard