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Merge pull request #3530 from chipsalliance/chisel5p1
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Bump to Chisel 5.1
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sequencer authored Nov 16, 2023
2 parents 11f0119 + 1751e0c commit 89f46b3
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion build.sc
Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,7 @@ object v {
val scala = "2.13.12"
// the first version in this Map is the mainly supported version which will be used to run tests
val chiselCrossVersions = Map(
"5.0.0" -> (ivy"org.chipsalliance::chisel:5.0.0", ivy"org.chipsalliance:::chisel-plugin:5.0.0"),
"5.1.0" -> (ivy"org.chipsalliance::chisel:5.1.0", ivy"org.chipsalliance:::chisel-plugin:5.1.0"),
// build from project from source
"source" -> (ivy"org.chipsalliance::chisel:99", ivy"org.chipsalliance:::chisel-plugin:99"),
)
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