Chisel compile warning: HasBlackBoxResource (#2356)

chipsalliance · Mar 27, 2020 · d1670c0 · d1670c0
1 parent 85af042
commit d1670c0
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Showing 2 changed files with 7 additions and 7 deletions.
diff --git a/src/main/scala/devices/debug/Periphery.scala b/src/main/scala/devices/debug/Periphery.scala
@@ -174,8 +174,8 @@ class SimDTM(implicit p: Parameters) extends BlackBox with HasBlackBoxResource {
     }
   }
 
-  setResource("/vsrc/SimDTM.v")
-  setResource("/csrc/SimDTM.cc")
+  addResource("/vsrc/SimDTM.v")
+  addResource("/csrc/SimDTM.cc")
 }
 
 class SimJTAG(tickDelay: Int = 50) extends BlackBox(Map("TICK_DELAY" -> IntParam(tickDelay)))
@@ -210,10 +210,10 @@ class SimJTAG(tickDelay: Int = 50) extends BlackBox(Map("TICK_DELAY" -> IntParam
     }
   }
 
-  setResource("/vsrc/SimJTAG.v")
-  setResource("/csrc/SimJTAG.cc")
-  setResource("/csrc/remote_bitbang.h")
-  setResource("/csrc/remote_bitbang.cc")
+  addResource("/vsrc/SimJTAG.v")
+  addResource("/csrc/SimJTAG.cc")
+  addResource("/csrc/remote_bitbang.h")
+  addResource("/csrc/remote_bitbang.cc")
 }
 
 object Debug {

diff --git a/src/main/scala/tile/LazyRoCC.scala b/src/main/scala/tile/LazyRoCC.scala
@@ -360,7 +360,7 @@ class BlackBoxExampleModuleImp(outer: BlackBoxExample, blackBoxFile: String)(imp
                       val rocc = roccIo.cloneType
                     })
         override def desiredName: String = blackBoxFile
-        setResource(s"/vsrc/$blackBoxFile.v")
+        addResource(s"/vsrc/$blackBoxFile.v")
       }
     )
   }