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Support vector extensions
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jerryz123 committed Aug 8, 2024
1 parent 306467d commit ee7f6a6
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Showing 4 changed files with 5 additions and 2 deletions.
1 change: 1 addition & 0 deletions src/main/scala/rocket/RocketCore.scala
Original file line number Diff line number Diff line change
Expand Up @@ -71,6 +71,7 @@ case class RocketCoreParams(
override def eLen = vector.map(_.eLen).getOrElse(0)
override def vfLen = vector.map(_.vfLen).getOrElse(0)
override def vfh = vector.map(_.vfh).getOrElse(false)
override def vExts = vector.map(_.vExts).getOrElse(Nil)
override def vMemDataBits = vector.map(_.vMemDataBits).getOrElse(0)
override val customIsaExt = Option.when(haveCease)("xrocket") // CEASE instruction
override def minFLen: Int = fpu.map(_.minFLen).getOrElse(32)
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3 changes: 2 additions & 1 deletion src/main/scala/rocket/VectorUnit.scala
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,8 @@ case class RocketCoreVectorParams(
vMemDataBits: Int,
decoder: Parameters => RocketVectorDecoder,
useDCache: Boolean,
issueVConfig: Boolean
issueVConfig: Boolean,
vExts: Seq[String]
)

class VectorCoreIO(implicit p: Parameters) extends CoreBundle()(p) {
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2 changes: 1 addition & 1 deletion src/main/scala/tile/BaseTile.scala
Original file line number Diff line number Diff line change
Expand Up @@ -125,7 +125,7 @@ trait HasNonDiplomaticTileParameters {
Option.when(tileParams.core.useConditionalZero)(Seq("zicond")) ++
Some(Seq("zicsr", "zifencei", "zihpm")) ++
Option.when(tileParams.core.fpu.nonEmpty && tileParams.core.fpu.get.fLen >= 16 && tileParams.core.fpu.get.minFLen <= 16)(Seq("zfh")) ++
zvl ++ zve ++ zvfh ++
zvl ++ zve ++ zvfh ++ Some(tileParams.core.vExts) ++
tileParams.core.customIsaExt.map(Seq(_))
).flatten
val multiLetterString = multiLetterExt.mkString("_")
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1 change: 1 addition & 0 deletions src/main/scala/tile/Core.scala
Original file line number Diff line number Diff line change
Expand Up @@ -69,6 +69,7 @@ trait CoreParams {
def eLen: Int = 0
def vfLen: Int = 0
def vfh: Boolean = false
def vExts: Seq[String] = Nil
def hasV: Boolean = vLen >= 128 && eLen >= 64 && vfLen >= 64
def vMemDataBits: Int = 0
}
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