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IDPool: RegInit reset literal value #2677

Merged
merged 1 commit into from
Oct 22, 2020
Merged

IDPool: RegInit reset literal value #2677

merged 1 commit into from
Oct 22, 2020

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ingallsj
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Related issue: introduced by #2673

Type of change: bug report

Impact: no functional change

Development Phase: implementation

Release Notes
work around Firrtl Async reset check failure

======== Starting Transform firrtl.checks.CheckResets ========
Exception in thread "main" firrtl.checks.CheckResets$NonLiteralAsyncResetValueException:  @[IDPool.scala 18:23]: [module IDPool] AsyncReset Reg 'bitmap' reset to non-literal 'bits(_bitmap_T, 7, 0)'

introduced by

val bitmap = RegInit(-1.S(numIds.W).asUInt()(numIds-1, 0))

from f165c98

@ingallsj ingallsj added the bug label Oct 22, 2020
@ingallsj ingallsj requested a review from ernie-sifive October 22, 2020 20:08
ernie-sifive
ernie-sifive approved these changes Oct 22, 2020
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Thanks John, looks good to me!

@ingallsj ingallsj merged commit d4359da into master Oct 22, 2020
@ingallsj ingallsj deleted the async_IDPool_RegInit branch October 22, 2020 21:42
@ingallsj ingallsj restored the async_IDPool_RegInit branch October 22, 2020 21:43
@ingallsj ingallsj deleted the async_IDPool_RegInit branch October 23, 2020 01:36
@ingallsj ingallsj mentioned this pull request Oct 23, 2020
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@ernie-sifive ernie-sifive ernie-sifive approved these changes

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@ingallsj @ernie-sifive