Verilog: separate path for downwards type progatation #1283
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This splits up the logic for downwards type progatation used for expression evaluation and for the RHS of assignments, given that they differ in behavior.
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tautschnig
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Sep 29, 2025
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This splits up the logic for downwards type progatation used for expression evaluation and for the RHS of assignments, given that they differ in behavior.