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@kroening kroening commented Oct 19, 2025

Explicit casts, such as size casts, act like assignments, and hence, use the assignment conversion.

@kroening kroening force-pushed the verilog-size-cast branch 2 times, most recently from d46b79b to 2b59932 Compare October 19, 2025 18:06
@kroening kroening changed the title Verilog: size casts are assignments Verilog: explicit casts are assignments Oct 19, 2025
@kroening kroening force-pushed the verilog-size-cast branch 6 times, most recently from 820327c to 4d979c2 Compare October 21, 2025 17:33
@kroening kroening marked this pull request as ready for review October 21, 2025 17:34
@tautschnig
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This now has git conflicts that require resolving.

Explicit casts, such as size casts, act like assignments, and hence, use the
assignment conversion.
@kroening
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This now has git conflicts that require resolving.

Done

@tautschnig tautschnig merged commit 389474c into main Oct 22, 2025
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@tautschnig tautschnig deleted the verilog-size-cast branch October 22, 2025 18:20
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