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Implement Sse2 memory fence instructions #16262

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merged 2 commits into from
Feb 8, 2018
Merged

Implement Sse2 memory fence instructions #16262

merged 2 commits into from
Feb 8, 2018

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tannergooding
tannergooding reviewed Feb 7, 2018
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src/jit/hwintrinsiccodegenxarch.cpp Outdated
op2Reg = op2->gtRegNum;
ival = Compiler::ivalOfHWIntrinsic(intrinsicID);
emit->emitIns_SIMD_R_R_R_I(ins, emitTypeSize(TYP_SIMD16), targetReg, op1Reg, op2Reg, ival);

break;
}

case NI_SSE2_LoadFence:
case NI_SSE2_MemoryFence:
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nit: It seems better to just duplicate the asserts here and have the cases handled separately.

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Agree, it will be at least couple of cycles less

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test Windows_NT x64 Checked jitincompletehwintrinsic
test Windows_NT x64 Checked jitx86hwintrinsicnoavx
test Windows_NT x64 Checked jitx86hwintrinsicnoavx2
test Windows_NT x64 Checked jitx86hwintrinsicnosimd
test Windows_NT x64 Checked jitnox86hwintrinsic

test Windows_NT x86 Checked jitincompletehwintrinsic
test Windows_NT x86 Checked jitx86hwintrinsicnoavx
test Windows_NT x86 Checked jitx86hwintrinsicnoavx2
test Windows_NT x86 Checked jitx86hwintrinsicnosimd
test Windows_NT x86 Checked jitnox86hwintrinsic

test Ubuntu x64 Checked jitincompletehwintrinsic
test Ubuntu x64 Checked jitx86hwintrinsicnoavx
test Ubuntu x64 Checked jitx86hwintrinsicnoavx2
test Ubuntu x64 Checked jitx86hwintrinsicnosimd
test Ubuntu x64 Checked jitnox86hwintrinsic

test OSX10.12 x64 Checked jitincompletehwintrinsic
test OSX10.12 x64 Checked jitx86hwintrinsicnoavx
test OSX10.12 x64 Checked jitx86hwintrinsicnoavx2
test OSX10.12 x64 Checked jitx86hwintrinsicnosimd
test OSX10.12 x64 Checked jitnox86hwintrinsic

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test Windows_NT x86 Checked jitx86hwintrinsicnosimd

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4creators commented Feb 8, 2018 •
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@tannergooding The above build timed out. In the other build there are some unrelated errors. Could you have a look and verify what is going on. I see quite a bit of random test failures in several runs in #16237 and in this PR.

https://ci.dot.net/job/dotnet_coreclr/job/master/job/jitstress/job/x64_checked_windows_nt_jitx86hwintrinsicnoavx2_prtest/79/

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4creators commented Feb 8, 2018 •
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Windows_NT x86 Checked Build and Test (Jit - EnableIncompleteISAClass=1 FeatureSIMD=0) timed out again

https://ci.dot.net/job/dotnet_coreclr/job/master/job/jitstress/job/x86_checked_windows_nt_jitx86hwintrinsicnosimd_prtest/85/

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test Windows_NT x64 Checked jitx86hwintrinsicnoavx2
test Windows_NT x86 Checked jitx86hwintrinsicnosimd

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Failures here are due to Test Infrastructure Failure: The paging file is too small for this operation to complete

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@tannergooding @fiigii @CarolEidt PTAL

The only failure is:

D:\j\workspace\x64_checked_w---9f07846f\bin\tests\Windows_NT.x64.Checked\TestWrappers\JIT.SIMD\JIT.SIMD.XUnitWrapper.cs(177): error : JIT_SIMD._AbsGeneric_r_AbsGeneric_r_._AbsGeneric_r_AbsGeneric_r_cmd [FAIL] [D:\j\workspace\x64_checked_w---9f07846f\tests\runtest.proj]
02:45:35.577         Not enough storage is available to process this command.
02:45:35.577         The syntax of the command is incorrect.

after which there other failures with 02:42:50.560 The system is out of environment space. messege appearing between them

https://ci.dot.net/job/dotnet_coreclr/job/master/job/jitstress/job/x64_checked_windows_nt_jitx86hwintrinsicnoavx2_prtest/79

CarolEidt
CarolEidt approved these changes Feb 8, 2018
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LGTM; I would like to see some minor changes, but would not hold up the merge for them.
@tannergooding could you review as well?

src/jit/hwintrinsiccodegenxarch.cpp
@@ -744,7 +744,7 @@ void CodeGen::genSSE2Intrinsic(GenTreeHWIntrinsic* node)
regNumber targetReg = node->gtRegNum;
var_types targetType = node->TypeGet();
var_types baseType = node->gtSIMDBaseType;
instruction ins = Compiler::insOfHWIntrinsic(intrinsicID, baseType);
instruction ins = INS_invalid;
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This is fine, but from a stylistic perspective, since this is only used inside a subset of the switch cases, one might move the declaration down into those scopes.

src/jit/hwintrinsicxarch.cpp
@@ -736,6 +736,8 @@ GenTree* Compiler::impSSE2Intrinsic(NamedIntrinsic intrinsic,
var_types baseType = TYP_UNKNOWN;
var_types retType = TYP_UNKNOWN;

assert((simdSize == 16) || (simdSize == 0));
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This could use a comment; I think that whenever we do the "simdSize == 0" check it deserves a comment, e.g. "A simdSize of zero means that it is not a SIMD type" because it could be confusing.

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The SSE code added:

// The Prefetch and StoreFence intrinsics don't take any SIMD operands
// and have a simdSize of 0

tannergooding
tannergooding reviewed Feb 8, 2018
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src/jit/emitxarch.cpp
// special case sfence and the prefetch instructions as they never take a VEX prefix
if ((ins == INS_vzeroupper) || (ins == INS_sfence) || (ins == INS_prefetcht0) || (ins == INS_prefetcht1) ||
(ins == INS_prefetcht2) || (ins == INS_prefetchnta))
// special case (l|m|s)fence and the prefetch instructions as they never take a VEX prefix
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nit: We could probably just say special case the fencing and prefetch instructions...

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@4creators, let us know if you are going to fix up in this PR, or in a follow up PR, so we know when to merge.

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@tannergooding I would prefer to fix this in next PR due to rerunning tests burden - I am working on all remaining Sse2 in #15777 right now and would prefer to fix it there.

@tannergooding tannergooding merged commit a526598 into dotnet:master Feb 8, 2018
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Thanks for letting us know. Merged.

@4creators 4creators deleted the sse2memory branch February 8, 2018 20:45
@4creators 4creators mentioned this pull request Feb 9, 2018
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@4creators 4creators mentioned this pull request Mar 6, 2018
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@CarolEidt CarolEidt CarolEidt approved these changes

@tannergooding tannergooding tannergooding approved these changes

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