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Arm64/Sve: Fix a SVE issue and add CI leg for testing SVE with AltJit #104998

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merged 6 commits into from
Jul 17, 2024
Merged

Arm64/Sve: Fix a SVE issue and add CI leg for testing SVE with AltJit #104998

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7d7d8e0
Add ci legs to test SVE using AltJit
kunalspathak Jul 16, 2024
1737e6f
fix a check for HWIntrinsic
kunalspathak Jul 16, 2024
ca23305
add gentree.cpp for now
kunalspathak Jul 16, 2024
0ef018f
Revert "add gentree.cpp for now"
kunalspathak Jul 16, 2024
c864900
review feedback
kunalspathak Jul 17, 2024
40d2434
just have 1 CI leg
kunalspathak Jul 17, 2024
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5 changes: 4 additions & 1 deletion eng/pipelines/common/templates/runtimes/run-test-job.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -190,7 +190,7 @@ jobs:
timeoutInMinutes: 390
${{ if in(parameters.testGroup, 'gcstress-extra', 'r2r-extra', 'clrinterpreter', 'pgo', 'pgostress', 'jit-experimental') }}:
timeoutInMinutes: 510
${{ if in(parameters.testGroup, 'jitstress-isas-x86', 'jitstress-isas-avx512') }}:
${{ if in(parameters.testGroup, 'jitstress-isas-x86', 'jitstress-isas-avx512', 'jitstress-isas-sve') }}:
timeoutInMinutes: 960

steps:
Expand Down Expand Up @@ -428,6 +428,9 @@ jobs:
- jitstress_isas_x86_evex
- jitstress_isas_x86_noavx512
- jitstressregs0x2000
${{ if in(parameters.testGroup, 'jitstress-isas-sve') }}:
scenarios:
- jitstress_isas_arm64_sve
${{ if in(parameters.testGroup, 'jitstressregs-x86') }}:
scenarios:
- jitstressregs1_x86_noavx
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2 changes: 1 addition & 1 deletion eng/pipelines/common/templates/runtimes/test-variables.yml
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Expand Up @@ -50,7 +50,7 @@ variables:
# gc reliability may take up to 2 hours to shutdown. Some scenarios have very long iteration times.
- name: timeoutPerTestInMinutes
value: 240
- ${{ if in(parameters.testGroup, 'jitstress', 'jitstress-random', 'jitstress-isas-arm', 'jitstress-isas-x86', 'jitstress-isas-avx512', 'jitstressregs-x86', 'jitstressregs', 'jitstress2-jitstressregs', 'jitelthookenabled' ) }}:
- ${{ if in(parameters.testGroup, 'jitstress', 'jitstress-random', 'jitstress-isas-arm', 'jitstress-isas-x86', 'jitstress-isas-avx512', 'jitstress-isas-sve', 'jitstressregs-x86', 'jitstressregs', 'jitstress2-jitstressregs', 'jitelthookenabled' ) }}:
- name: timeoutPerTestCollectionInMinutes
value: 120
- name: timeoutPerTestInMinutes
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36 changes: 36 additions & 0 deletions eng/pipelines/coreclr/jitstress-isas-sve.yml
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@@ -0,0 +1,36 @@
# This pipeline only runs on GitHub PRs, not on merges.
trigger: none

# Only run on specific changes to the JIT directory that are likely to affect Sve.
pr:
branches:
include:
- main
paths:
include:
- src/coreclr/jit/hwintrinsiccodegenarm64.cpp
- src/coreclr/jit/hwintrinsiclistarm64sve.h
- src/coreclr/jit/hwintrinsicarm64.cpp
- src/coreclr/jit/instrsarm64sve.h
- src/coreclr/jit/emitarm64sve.cpp
- src/coreclr/jit/emitfmtsarm64sve.h
- src/coreclr/jit/lsraarm64.cpp

schedules:
- cron: "30 19 * * 6"
displayName: Sat at 11:30 AM (UTC-8:00)
branches:
include:
- main
always: true

variables:
- template: /eng/pipelines/common/variables.yml

extends:
template: /eng/pipelines/coreclr/templates/jit-outerloop-pipeline.yml
parameters:
platforms:
# just run on windows for now, because abi is universal for other platforms
- windows_x64
testGroup: jitstress-isas-sve
4 changes: 2 additions & 2 deletions src/coreclr/jit/gentree.cpp
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Expand Up @@ -30439,10 +30439,10 @@ GenTree* Compiler::gtFoldExprHWIntrinsic(GenTreeHWIntrinsic* tree)
#if defined(TARGET_XARCH)
tryHandle = op->OperIsHWIntrinsic();
#elif defined(TARGET_ARM64)
if (op->OperIsHWIntrinsic() && op->OperIsHWIntrinsic(NI_Sve_CreateTrueMaskAll))
if (op->OperIsHWIntrinsic(NI_Sve_CreateTrueMaskAll))
{
op = op2;
tryHandle = true;
tryHandle = op->OperIsHWIntrinsic();
}
#endif // TARGET_ARM64

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1 change: 1 addition & 0 deletions src/tests/Common/testenvironment.proj
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Expand Up @@ -172,6 +172,7 @@
<TestEnvironment Include="jitstress_isas_2_x86_nosse41" JitStress="2" EnableSSE41="0" /> <!-- Depends on SSSE3 and SSE3_4 -->
<TestEnvironment Include="jitstress_isas_2_x86_nosse42" JitStress="2" EnableSSE42="0" /> <!-- Depends on SSE41 -->
<TestEnvironment Include="jitstress_isas_2_x86_nossse3" JitStress="2" EnableSSSE3="0" /> <!-- Depends on SSE3 -->
<TestEnvironment Include="jitstress_isas_arm64_sve" AltJitName="clrjit_universal_arm64_x64.dll" AltJit="*" MaxVectorTBitWidth="128" /> <!-- Trigger Sve code paths-->
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Will this cause problems on an Arm64 box where I believe it would be clrjit_universal_arm64_arm64.dll instead?

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I'm guessing "no" by default since its set to run only on Windows_x64 machines?

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that's right...and that was the reason i did not have on linux/x64 either, otherwise would have to specify libclrjit_universal_arm64_x64.so

<TestEnvironment Include="jitstressregs1_x86_noavx" JitStressRegs="1" EnableAVX="0" />
<TestEnvironment Include="jitstressregs2_x86_noavx" JitStressRegs="2" EnableAVX="0" />
<TestEnvironment Include="jitstressregs3_x86_noavx" JitStressRegs="3" EnableAVX="0" />
Expand Down
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