Optimize scalar conversions with AVX512 #84384

khushal1996 · 2023-04-05T21:51:31Z

This PR optimize the following cases:

Case	Previous Code	Optimized Instruction
ulong -> double	vcvtsi2sd	vcvtusi2sd

public static double UIntToDouble(UInt64 val)
{
    return (double)val;
}

Assembly before optimization

G_M33997_IG01:              ;; offset=0000H
       C5F877               vzeroupper 
						;; size=3 bbWeight=1 PerfScore 1.00
G_M33997_IG02:              ;; offset=0003H
       62F17C0857C0         vxorps   xmm0, xmm0
       62F1FF082AC1         vcvtsi2sd  xmm0, rcx
       4885C9               test     rcx, rcx
       7D0A                 jge      SHORT G_M33997_IG03
       62F1FF08580502000000 vaddsd   xmm0, qword ptr [reloc @RWD00]
						;; size=27 bbWeight=1 PerfScore 12.58
G_M33997_IG03:              ;; offset=001EH
       C3                   ret

Assembly after optimization

G_M33997_IG01:              ;; offset=0000H
       C5F877               vzeroupper 
						;; size=3 bbWeight=1 PerfScore 1.00
G_M33997_IG02:              ;; offset=0003H
       62F1FF087BC1         vcvtusi2sd xmm0, rcx
						;; size=6 bbWeight=1 PerfScore 4.00
G_M33997_IG03:              ;; offset=0009H
       C3                   ret

Case	Previous Code	Optimized Instruction
ulong -> float	ulong->double->float	vcvttusi2ss

[MethodImplAttribute(MethodImplOptions.NoInlining)]
public static float ConvUlongToFloat(ulong val)
{
    return (float)val;
}

Assembly before optimization

G_M2883_IG01:  ;; offset=0000H
       push     rbp
       sub      rsp, 48
       vzeroupper 
       lea      rbp, [rsp+30H]
       xor      eax, eax
       mov      dword ptr [rbp-04H], eax
       mov      qword ptr [rbp+10H], rcx
						;; size=22 bbWeight=1 PerfScore 5.00
G_M2883_IG02:  ;; offset=0016H
       cmp      dword ptr [(reloc 0x7ff8bc0d2898)], 0
       je       SHORT G_M2883_IG04
						;; size=9 bbWeight=1 PerfScore 4.00
G_M2883_IG03:  ;; offset=001FH
       call     CORINFO_HELP_DBG_IS_JUST_MY_CODE
						;; size=5 bbWeight=0.50 PerfScore 0.50
G_M2883_IG04:  ;; offset=0024H
       nop      
       mov      rax, qword ptr [rbp+10H]
       vcvtusi2sd xmm0, rax
       vcvtsd2ss xmm0, xmm0, xmm0
       vmovss   dword ptr [rbp-04H], xmm0
       nop      
						;; size=25 bbWeight=1 PerfScore 10.50
G_M2883_IG05:  ;; offset=003DH
       vmovss   xmm0, dword ptr [rbp-04H]
						;; size=7 bbWeight=1 PerfScore 3.00
G_M2883_IG06:  ;; offset=0044H
       add      rsp, 48
       pop      rbp
       ret      
						;; size=6 bbWeight=1 PerfScore 1.75

Assembly after optimization

G_M2883_IG01:  ;; offset=0000H
       push     rbp
       sub      rsp, 48
       vzeroupper 
       lea      rbp, [rsp+30H]
       xor      eax, eax
       mov      dword ptr [rbp-04H], eax
       mov      qword ptr [rbp+10H], rcx
						;; size=22 bbWeight=1 PerfScore 5.00
G_M2883_IG02:  ;; offset=0016H
       cmp      dword ptr [(reloc 0x7ff8b54b2898)], 0
       je       SHORT G_M2883_IG04
						;; size=9 bbWeight=1 PerfScore 4.00
G_M2883_IG03:  ;; offset=001FH
       call     CORINFO_HELP_DBG_IS_JUST_MY_CODE
						;; size=5 bbWeight=0.50 PerfScore 0.50
G_M2883_IG04:  ;; offset=0024H
       nop      
       mov      rax, qword ptr [rbp+10H]
       vcvtusi2ss xmm0, rax
       vmovss   dword ptr [rbp-04H], xmm0
       nop      
						;; size=19 bbWeight=1 PerfScore 8.50
G_M2883_IG05:  ;; offset=0037H
       vmovss   xmm0, dword ptr [rbp-04H]
						;; size=7 bbWeight=1 PerfScore 3.00
G_M2883_IG06:  ;; offset=003EH
       add      rsp, 48
       pop      rbp
       ret      
						;; size=6 bbWeight=1 PerfScore 1.75

ghost · 2023-04-05T21:51:50Z

Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch, @kunalspathak
See info in area-owners.md if you want to be subscribed.

Issue Details

Draft PR for testing purposes. No need for review at this time.

This PR optimize the following cases:

Case	Previous Code	Optimized Instruction
float -> ulong	CORINFO_HELP_DBL2ULNG Helper	vcvttss2usi

public static UInt64 FloatToULong(float val)
{
    return (UInt64)val;
}

Assembly before optimization

G_M22196_IG01:              ;; offset=0000H
       4883EC28             sub      rsp, 40
       C5F877               vzeroupper 
						;; size=7 bbWeight=1 PerfScore 1.25
G_M22196_IG02:              ;; offset=0007H
       62F17E085AC0         vcvtss2sd xmm0, xmm0
       E87E57815E           call     CORINFO_HELP_DBL2ULNG
       90                   nop      
						;; size=12 bbWeight=1 PerfScore 5.25
G_M22196_IG03:              ;; offset=0013H
       4883C428             add      rsp, 40
       C3                   ret      
						;; size=5 bbWeight=1 PerfScore 1.25

Assembly afteroptimization

G_M22196_IG01:              ;; offset=0000H
       C5F877               vzeroupper 
						;; size=3 bbWeight=1 PerfScore 1.00
G_M22196_IG02:              ;; offset=0003H
       62F1FE0878C0         vcvttss2usi rax, xmm0
						;; size=6 bbWeight=1 PerfScore 6.00
G_M22196_IG03:              ;; offset=0009H
       C3                   ret

Case	Previous Code	Optimized Instruction
double -> ulong	CORINFO_HELP_DBL2ULNG Helper	vcvttsd2usi

public static UInt64 DoubleToULong(double val)
{
    return (UInt64)val;
}

Assembly before optimization

G_M30068_IG01:              ;; offset=0000H
       4883EC28             sub      rsp, 40
       C5F877               vzeroupper 
						;; size=7 bbWeight=1 PerfScore 1.25
G_M30068_IG02:              ;; offset=0007H
       E874577F5E           call     CORINFO_HELP_DBL2ULNG
       90                   nop      
						;; size=6 bbWeight=1 PerfScore 1.25
G_M30068_IG03:              ;; offset=000DH
       4883C428             add      rsp, 40
       C3                   ret

Assembly afteroptimization

G_M30068_IG01:              ;; offset=0000H
       C5F877               vzeroupper 
						;; size=3 bbWeight=1 PerfScore 1.00
G_M30068_IG02:              ;; offset=0003H
       62F1FF0878C0         vcvttsd2usi rax, xmm0
						;; size=6 bbWeight=1 PerfScore 5.00
G_M30068_IG03:              ;; offset=0009H
       C3                   ret

Case	Previous Code	Optimized Instruction
ulong -> double	vcvtsi2sd	vcvtusi2sd

public static double UIntToDouble(UInt64 val)
{
    return (double)val;
}

Assembly before optimization

G_M33997_IG01:              ;; offset=0000H
       C5F877               vzeroupper 
						;; size=3 bbWeight=1 PerfScore 1.00
G_M33997_IG02:              ;; offset=0003H
       62F17C0857C0         vxorps   xmm0, xmm0
       62F1FF082AC1         vcvtsi2sd  xmm0, rcx
       4885C9               test     rcx, rcx
       7D0A                 jge      SHORT G_M33997_IG03
       62F1FF08580502000000 vaddsd   xmm0, qword ptr [reloc @RWD00]
						;; size=27 bbWeight=1 PerfScore 12.58
G_M33997_IG03:              ;; offset=001EH
       C3                   ret

Assembly afteroptimization

G_M33997_IG01:              ;; offset=0000H
       C5F877               vzeroupper 
						;; size=3 bbWeight=1 PerfScore 1.00
G_M33997_IG02:              ;; offset=0003H
       62F1FF087BC1         vcvtusi2sd xmm0, rcx
						;; size=6 bbWeight=1 PerfScore 4.00
G_M33997_IG03:              ;; offset=0009H
       C3                   ret

Author:	khushal1996
Assignees:	-
Labels:	`area-CodeGen-coreclr`
Milestone:	-

khushal1996 · 2023-04-07T23:11:21Z

I am making Submissions in the course of work for my employer (or my employer has intellectual property rights in my Submissions by contract or applicable law). I have permission from my employer to make Submissions and enter into this Agreement on behalf of my employer. By signing below, the defined term “You” includes me and my employer.

@dotnet-policy-service agree company="Intel"

src/coreclr/vm/jithelpers.cpp

src/tests/JIT/Directed/Convert/out_of_range_fp_to_int_conversions.cpp

src/libraries/System.Runtime/tests/System/UIntPtrTests.GenericMath.cs

src/coreclr/jit/instrsxarch.h

src/coreclr/vm/jithelpers.cpp

src/libraries/System.Runtime/tests/System/UIntPtrTests.GenericMath.cs

src/coreclr/vm/jithelpers.cpp

khushal1996 · 2023-06-30T19:08:11Z

We are narrowing down the scope of the PR to ulong -> float conversions. The changes will b e updated soon.

jkotas · 2023-06-30T21:00:32Z

src/coreclr/nativeaot/Runtime/MathHelpers.cpp

@@ -18,8 +18,46 @@ FORCEINLINE int64_t FastDbl2Lng(double val)
 #endif


The changes in this file and in jithelpers.cpp should be rolled back too.

khushal1996 · 2023-07-01T03:09:40Z

@tannergooding @jkotas does this look good for merge? I have rolled back the changes for float/double -> I long and optimized ulong -> float/double cases.

jkotas

It looks good to me. I have commented on a few nits.

Somebody on @dotnet/jit-contrib should do final review and merge.

src/coreclr/jit/morph.cpp

src/coreclr/jit/lowerxarch.cpp

src/coreclr/jit/instr.cpp

src/coreclr/jit/importer.cpp

khushal1996 · 2023-07-05T20:42:14Z

@jkotas I think we are good to go here. Would you please help with the approval and merge.

jkotas · 2023-07-05T20:58:39Z

@kunalspathak Could you please do final review and merge?

khushal1996 · 2023-07-11T07:04:34Z

@kunalspathak can you help to merge this changes? They have been approved and we are trying to get them in before the next release.

src/coreclr/jit/morph.cpp

…-rebased

tannergooding · 2023-07-16T13:55:23Z

SPMI failures are the general No Azure Storage MCH files to download from cef79bc8-29bf-4f7b-9d05-9fc06832098c/osx/arm64/ impacting other PRs.

CI was passing before the minor formatting cleanup requested

dotnet-issue-labeler bot added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Apr 5, 2023

ghost added the community-contribution Indicates that the PR has been added by a community member label Apr 5, 2023

khushal1996 changed the title ~~Avx512 scalar convert rebased~~ Optimize scalar conversions with AVX512 Apr 5, 2023

BruceForstall added the avx512 Related to the AVX-512 architecture label Apr 7, 2023

tannergooding reviewed Apr 30, 2023

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build-analysis bot mentioned this pull request May 12, 2023

PreserializedResourceWriterTests.TestResourceManagerIsSafeForConcurrentAccessAndEnumeration test failure #86013

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khushal1996 mentioned this pull request May 12, 2023

Isolating JITDbl2Ulng helper changes #86175

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khushal1996 force-pushed the avx512-scalar-convert-rebased branch from a2c8d52 to bb4a91e Compare May 19, 2023 18:57

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Build ios-arm64 Release AllSubsets_Mono failures dotnet/arcade#13625

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khushal1996 requested review from marek-safar, thaystg, radical, BrzVlad and lambdageek as code owners May 22, 2023 06:03

Rolling back changes for double/float -> ulong

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khushal1996 added 5 commits June 30, 2023 14:30

Rolling back changes for double/float -> ulong

9b56b86

Reverting ouf_or_range_fp_conversion to original version

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Reverting ouf_or_range_fp_conversion to original version

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Reverting jithelpers.cpp to original versino

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Reverting jithelpers.cpp to original version

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System.Security.Cryptography.X509Certificates.Tests.ChainTests.BuildInvalidSignatureTwice failure #82837

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Changind comments, reverting asserts, skipping to change node for cast

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addressing review comments

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LibraryImportGenerator.Unit.Tests crashed in CI #87951

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Update src/coreclr/jit/morph.cpp

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Merge remote-tracking branch 'dotnet/main' into avx512-scalar-convert…

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Add optimization for vector conversion of uint/ulong to float/double. #89277

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Add optimization for scalar conversion of float/double to ulong. #89279

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What's new in .NET 8 Preview 7 [WIP] dotnet/core#8438

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Optimize scalar conversions with AVX512 #84384

Optimize scalar conversions with AVX512 #84384

khushal1996 commented Apr 5, 2023 •

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khushal1996 commented Jun 30, 2023

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khushal1996 commented Jul 11, 2023

tannergooding commented Jul 16, 2023

		@@ -18,8 +18,46 @@ FORCEINLINE int64_t FastDbl2Lng(double val)
		#endif

Optimize scalar conversions with AVX512 #84384

Optimize scalar conversions with AVX512 #84384

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