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llvm: Update baseline to fbc18b85d6ce5ab6489a2b08f9b38d446fe9d6f6
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github-actions[bot] committed Dec 18, 2024
1 parent 1a96ce0 commit 7138611
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion llvm/llvm-project
Submodule llvm-project updated 50 files
+56 −5 lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
+7 −0 lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.h
+1 −1 lldb/test/Shell/ObjectFile/XCOFF/basic-info.yaml
+11 −0 llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
+73 −8 llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp
+3 −1 llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp
+22 −0 llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
+2 −0 llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
+53 −2 llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
+8 −1 llvm/lib/Target/Xtensa/XtensaISelDAGToDAG.cpp
+5 −2 llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
+101 −0 llvm/lib/Target/Xtensa/XtensaInstrInfo.td
+14 −0 llvm/lib/Target/Xtensa/XtensaOperands.td
+8 −2 llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+8 −26 llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+44 −0 llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-divergent.ll
+182 −2 llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
+2 −2 llvm/test/MC/AMDGPU/gfx950_asm_read_tr.s
+1 −1 llvm/test/MC/AMDGPU/gfx950_asm_vop1_dpp16.s
+4 −4 llvm/test/MC/AMDGPU/gfx950_asm_vop3.s
+1 −1 llvm/test/MC/AMDGPU/gfx950_invalid_encoding.txt
+1 −1 llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_ds_read_tr.txt
+1 −1 llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop1.txt
+1 −1 llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
+1 −1 llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_xdlops.txt
+64 −0 llvm/test/MC/Disassembler/Xtensa/code_density.txt
+2 −0 llvm/test/MC/Disassembler/Xtensa/lit.local.cfg
+14 −9 llvm/test/MC/Xtensa/Relocations/fixups.s
+10 −2 llvm/test/MC/Xtensa/Relocations/relocations.s
+21 −0 llvm/test/MC/Xtensa/code_density-invalid.s
+68 −0 llvm/test/MC/Xtensa/code_density.s
+25 −0 llvm/test/Transforms/InstCombine/icmp-logical.ll
+0 −154 llvm/test/Transforms/VectorCombine/X86/extract-fneg-insert.ll
+0 −59 llvm/test/tools/llvm-exegesis/RISCV/latency-by-extension-A.s
+0 −48 llvm/test/tools/llvm-exegesis/RISCV/latency-by-extension-C.s
+0 −11 llvm/test/tools/llvm-exegesis/RISCV/latency-by-opcode-name-FADD_D.s
+0 −3 llvm/tools/llvm-exegesis/lib/CMakeLists.txt
+3 −15 llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
+1 −10 llvm/tools/llvm-exegesis/lib/MCInstrDescView.h
+0 −22 llvm/tools/llvm-exegesis/lib/RISCV/CMakeLists.txt
+0 −275 llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
+12 −4 llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp
+4 −6 llvm/tools/llvm-exegesis/lib/SnippetFile.cpp
+1 −11 llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
+11 −22 llvm/tools/llvm-exegesis/llvm-exegesis.cpp
+19 −19 llvm/utils/extract_symbols.py
+39 −18 mlir/include/mlir/Dialect/SCF/Transforms/TileUsingInterface.h
+7 −6 mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
+257 −200 mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
+2 −1 mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.cpp

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