remove sparecell std cell macro because it causes DRCs

efabless · Mar 18, 2024 · 30f4d82 · 30f4d82
1 parent 38df6cc
commit 30f4d82
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Showing 2 changed files with 18 additions and 18 deletions.
diff --git a/verilog/rtl/gpio_control_block.v b/verilog/rtl/gpio_control_block.v
@@ -250,15 +250,15 @@ module gpio_control_block #(
  /* going to the user project. */
  assign user_gpio_in = pad_gpio_in & gpio_logic1;
 
- (* keep *)
- sky130_fd_sc_hd__macro_sparecell spare_cell (
-`ifdef USE_POWER_PINS
- .VPWR(vccd),
- .VGND(vssd),
- .VPB(vccd),
- .VNB(vssd)
-`endif
- );
+//  (* keep *)
+//  sky130_fd_sc_hd__macro_sparecell spare_cell (
+// `ifdef USE_POWER_PINS
+//  .VPWR(vccd),
+//  .VGND(vssd),
+//  .VPB(vccd),
+//  .VNB(vssd)
+// `endif
+//  );
 
  sky130_fd_sc_hd__conb_1 const_source (
 `ifdef USE_POWER_PINS

diff --git a/verilog/rtl/gpio_control_block_mgmt.v b/verilog/rtl/gpio_control_block_mgmt.v
@@ -257,15 +257,15 @@ module gpio_control_block_mgmt #(
  /* going to the user project. */
  assign user_gpio_in = pad_gpio_in & gpio_logic1;
 
- (* keep *)
- sky130_fd_sc_hd__macro_sparecell spare_cell (
-`ifdef USE_POWER_PINS
- .VPWR(vccd),
- .VGND(vssd),
- .VPB(vccd),
- .VNB(vssd)
-`endif
- );
+//  (* keep *)
+//  sky130_fd_sc_hd__macro_sparecell spare_cell (
+// `ifdef USE_POWER_PINS
+//  .VPWR(vccd),
+//  .VGND(vssd),
+//  .VPB(vccd),
+//  .VNB(vssd)
+// `endif
+//  );
 
  // buffering const one and zero outputs
  wire one_unbuf;