interconnect/axi: add connect_to_pads to full AXI

enjoy-digital · Dec 18, 2020 · f26769e · f26769e
1 parent 18e9023
commit f26769e
Showing 1 changed file with 10 additions and 1 deletion.
diff --git a/litex/soc/interconnect/axi.py b/litex/soc/interconnect/axi.py
@@ -140,7 +140,16 @@ def __init__(self, data_width=32, address_width=32, id_width=1, clock_domain="sy
         self.r  = stream.Endpoint(r_description(data_width, id_width))
 
     def connect_to_pads(self, pads, mode="master"):
-        return connect_to_pads(self, pads, mode)
+        r = connect_to_pads(self, pads, mode)
+
+        if mode == "master":
+            r.append(pads.wlast.eq(self.w.last))
+            r.append(self.r.last.eq(pads.rlast))
+        else:
+            r.append(pads.rlast.eq(self.r.last))
+            r.append(self.w.last.eq(pads.wlast))
+
+        return r
 
     def get_ios(self, bus_name="wb"):
         subsignals = []