add new soc ctrl regs

esl-epfl · Sep 14, 2023 · cf81e42 · cf81e42
1 parent 29ef98c
commit cf81e42
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Showing 4 changed files with 46 additions and 3 deletions.
diff --git a/hw/core-v-mini-mcu/system_bus.sv.tpl b/hw/core-v-mini-mcu/system_bus.sv.tpl
@@ -123,7 +123,7 @@ module system_bus
   assign bus_error_address_o  = error_slave_req.addr;
   assign error_slave_resp.gnt = error_slave_req.req;
   assign error_slave_resp.rvalid = error_slave_resp_rvalid;
-  assign error_slave_resp.rdata  = 32'hdeadbeef;
+  assign error_slave_resp.rdata  = 32'hbada55e5;
 
   // Internal master requests
   assign int_master_req[core_v_mini_mcu_pkg::CORE_INSTR_IDX] = core_instr_req_i;
@@ -206,7 +206,7 @@ module system_bus
       error_slave_resp_rvalid <= 1'b0;
     end else begin
 `ifndef SYNTHESIS
-      if(rst_ni)
+      if(rst_ni && bus_error_o)
         $display("%t Out of bound memory access 0x%08x", $time, error_slave_req.addr);
 `endif
       error_slave_resp_rvalid <= error_slave_resp.gnt;

diff --git a/sw/device/lib/drivers/soc_ctrl/soc_ctrl.c b/sw/device/lib/drivers/soc_ctrl/soc_ctrl.c
@@ -40,4 +40,16 @@ void soc_ctrl_select_spi_host(const soc_ctrl_t *soc_ctrl) {
 
 uint32_t get_spi_flash_mode(const soc_ctrl_t *soc_ctrl) {
   return mmio_region_read32(soc_ctrl->base_addr, (ptrdiff_t)(SOC_CTRL_USE_SPIMEMIO_REG_OFFSET));
-}
+}
+
+uint32_t get_bus_error(const soc_ctrl_t *soc_ctrl) {
+  return mmio_region_read32(soc_ctrl->base_addr, (ptrdiff_t)(SOC_CTRL_BUS_ERROR_REG_OFFSET));
+}
+
+void clear_bus_error(const soc_ctrl_t *soc_ctrl) {
+  mmio_region_write32(soc_ctrl->base_addr, (ptrdiff_t)(SOC_CTRL_BUS_ERROR_REG_OFFSET), 0x0);
+}
+
+uint32_t get_bus_error_address(const soc_ctrl_t *soc_ctrl) {
+  return mmio_region_read32(soc_ctrl->base_addr, (ptrdiff_t)(SOC_CTRL_BUS_ERROR_ADDRESS_REG_OFFSET));
+}
diff --git a/sw/device/lib/drivers/soc_ctrl/soc_ctrl.h b/sw/device/lib/drivers/soc_ctrl/soc_ctrl.h
@@ -66,6 +66,30 @@ void soc_ctrl_select_spi_host(const soc_ctrl_t *soc_ctrl);
 
 uint32_t get_spi_flash_mode(const soc_ctrl_t *soc_ctrl);
 
+/**
+ * Get the bus error
+ * @param soc_ctrl Pointer to soc_ctrl_t represting the target SOC CTRL.
+ */
+
+uint32_t get_bus_error(const soc_ctrl_t *soc_ctrl);
+
+/**
+ * Clear the bus error
+ * @param soc_ctrl Pointer to soc_ctrl_t represting the target SOC CTRL.
+ */
+
+void clear_bus_error(const soc_ctrl_t *soc_ctrl);
+
+/**
+ * Get the bus error address
+ * @param soc_ctrl Pointer to soc_ctrl_t represting the target SOC CTRL.
+ */
+
+uint32_t get_bus_error_address(const soc_ctrl_t *soc_ctrl);
+
+
+
+
 #ifdef __cplusplus
 }
 #endif

diff --git a/sw/device/lib/drivers/soc_ctrl/soc_ctrl_regs.h b/sw/device/lib/drivers/soc_ctrl/soc_ctrl_regs.h
@@ -48,6 +48,13 @@ extern "C" {
 // system is running (in Hz)
 #define SOC_CTRL_SYSTEM_FREQUENCY_HZ_REG_OFFSET 0x1c
 
+// Bus access error
+#define SOC_CTRL_BUS_ERROR_REG_OFFSET 0x20
+#define SOC_CTRL_BUS_ERROR_BUS_ERROR_BIT 0
+
+// Bus access error address
+#define SOC_CTRL_BUS_ERROR_ADDRESS_REG_OFFSET 0x24
+
 #ifdef __cplusplus
 }  // extern "C"
 #endif