Add example of DSLX design parameterization based on proto files

[lpawelcz]

This example showcases the usage of proto_to_dslx tool in DSLX design parameterization. It defines a protobuf message containing design parameters:

• input width,
• output width

Two textproto files with different variants of the design are provided. Each textproto file can be converted to DSLX file which is then imported by top-level design in order to use the parameters.

The design itself has 2 inputs and one output. The widths of those are controlled by parameters.

In order to provide single import path in top DSLX file custom configuration setting 'design_variant' was provided. It is used to select the design variant from bazel command line.

Verilog files for the variants can be generated with:

bazel build //xls/examples/parameterized:design_verilog --//xls/examples/parameterized:design_variant=narrow

and:

bazel build //xls/examples/parameterized:design_verilog --//xls/examples/parameterized:design_variant=wide

@proppy In this example I wanted to explore your suggestion from #1160 (comment), please take a look.

[proppy]

thanks for adding this, left some preliminary comments.

@hongted, I don't think we have an equivalent of this yet? (afaik we mainly rely on genrules for this internally)

[lpawelcz]

Removed DesignType parameter to keep the example minimal, rebased the code, edited description and cleaned git history. @proppy please take another look.