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Add example of DSLX design parameterization based on proto files #1183

Merged
merged 2 commits into from
Mar 8, 2024
Merged

Add example of DSLX design parameterization based on proto files #1183

merged 2 commits into from
Mar 8, 2024

Commits on Feb 22, 2024

  1. build_rules: utilities: add proto_to_dslx rule 

    Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
    @lpawelcz
    lpawelcz committed Feb 22, 2024
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  2. examples: Add parameterized design example 

    This example showcases the usage of proto_to_dslx tool in DSLX design
parameterization.
It defines a protobuf message containing design parameters:

* input width,
* output width

A textproto file with a variant of the design is provided.
Textproto file can be converted to DSLX file which is then imported
by top-level design in order to use the parameters.

The design itself has 2 inputs and one output. The widths of those are
controlled by parameters.

Verilog file for the variant can be generated with:

```
bazel build //xls/examples/parameterized:design_verilog
```

Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
    @lpawelcz
    lpawelcz committed Feb 22, 2024
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