[SYCL] Make vec load store member functions templated #920
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sycl/include/CL/sycl/types.hpp
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Cannot find such overload in the spec
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@AlexeySachkov but it is being used in CTS
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@alexbatashev, then it is either CTS bug or spec bug.
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@AlexeySachkov I submitted an issue to track this question KhronosGroup/SYCL-CTS#36
sycl/include/CL/sycl/types.hpp
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Signed-off-by: Alexander Batashev <alexander.batashev@intel.com>
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Signed-off-by: Alexander Batashev <alexander.batashev@intel.com>
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Overall, I don't have objections against the patch. Situation with extra overload seems to me like a spec bug because this overload is used in official conformance tests.
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There's no real difference at the SPIR-V level between these and the more generic mem_fence intrinsic because mem_fence is already relaxed and SPIR-V doesn't have a concept of anything more relaxed than that. Closes: intel#920 Original commit: KhronosGroup/SPIRV-LLVM-Translator@a53d233
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There's no real difference at the SPIR-V level between these and the more generic mem_fence intrinsic because mem_fence is already relaxed and SPIR-V doesn't have a concept of anything more relaxed than that. Closes: #920 Original commit: KhronosGroup/SPIRV-LLVM-Translator@a53d233
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…tuff [NFC] Remove more old debug info handling.
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…tuff [NFC] Remove more old debug info handling.
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…tuff [NFC] Remove more old debug info handling.
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…14b not in (#920) 5e0f14b was reverted in 1a21f73. The test was added in c4fd801.
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…14b not in (#920) 5e0f14b was reverted in 1a21f73. The test was added in c4fd801.
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…14b not in (#920) 5e0f14b was reverted in 1a21f73. The test was added in c4fd801.
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The SYCL specification mentions load and store member functions as
This patch aligns our implementation with the definition that is provided by the spec.
Signed-off-by: Alexander Batashev alexander.batashev@intel.com