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Add strip assertions flag #19014

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merged 5 commits into from
Nov 14, 2024
Merged

Add strip assertions flag #19014

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97f3f0e
Add strip assertions flag
IanWood1 Nov 5, 2024
8979032
Move StripDebugOpsPass earlier in global opt
IanWood1 Nov 6, 2024
5da931f
Merge branch 'main' into strip_assertions
IanWood1 Nov 6, 2024
8c7462a
Merge branch 'main' into strip_assertions
IanWood1 Nov 13, 2024
384f26c
Merge branch 'main' into strip_assertions
IanWood1 Nov 14, 2024
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4 changes: 2 additions & 2 deletions .github/workflows/pkgci_regression_test.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -221,7 +221,7 @@ jobs:
--goldentime-rocm-clip-ms 18.5 \
--goldentime-rocm-vae-ms 337.0 \
--goldendispatch-rocm-unet 1531 \
--goldendispatch-rocm-clip 1141 \
--goldendispatch-rocm-clip 1139 \
--goldendispatch-rocm-vae 246 \
--goldensize-rocm-unet-bytes 2280000 \
--goldensize-rocm-clip-bytes 860000 \
Expand All @@ -243,7 +243,7 @@ jobs:
--goldentime-rocm-clip-ms 15.5 \
--goldentime-rocm-vae-ms 80.0 \
--goldendispatch-rocm-unet 1531 \
--goldendispatch-rocm-clip 1141 \
--goldendispatch-rocm-clip 1139 \
--goldendispatch-rocm-vae 246 \
--goldensize-rocm-unet-bytes 2270000 \
--goldensize-rocm-clip-bytes 860000 \
Expand Down
12 changes: 4 additions & 8 deletions compiler/src/iree/compiler/GlobalOptimization/Passes.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -95,6 +95,8 @@ void buildGlobalOptimizationPassPipeline(

// Preprocessing passes to get the program into a canonical state.
FunctionLikeNest(mainPassManager)
.addPredicatedPass(transformOptions.options.stripAssertions,
IREE::Util::createStripDebugOpsPass)
.addPass(IREE::Util::createOptimizeIntArithmeticPass)
.addPass(createLinalgQuantizedConvToConvPass)
.addPass(createLinalgQuantizedMatmulToMatmulPass)
Expand Down Expand Up @@ -217,16 +219,10 @@ void buildGlobalOptimizationPassPipeline(

FunctionLikeNest(mainPassManager)
.addPass(IREE::Flow::createCanonicalizerPass)
.addPass(mlir::createCSEPass);

FunctionLikeNest(mainPassManager)
.addPass(mlir::createCSEPass)
// After running const-eval to a fixed point and folding unit extent dims,
// try any new raising opportunities.
.addPass(createRaiseSpecialOpsPass)
// Strip std.assert & co after we perform optimizations; prior to this we
// may use the assertions to derive information during analysis.
.addPredicatedPass(transformOptions.options.stripAssertions,
IREE::Util::createStripDebugOpsPass);
.addPass(createRaiseSpecialOpsPass);

// Export after const-eval. If the user wants to keep the input constants
// as is in the final parameter archive, they will probably want to disable
Expand Down
2 changes: 2 additions & 0 deletions experimental/regression_suite/shark-test-suite-models/sdxl/test_clip.py
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Expand Up @@ -63,6 +63,7 @@
"--iree-llvmcpu-fail-on-out-of-bounds-stack-allocation=false",
"--iree-llvmcpu-distribution-size=32",
"--iree-opt-const-eval=false",
"--iree-opt-strip-assertions=true",
"--iree-llvmcpu-enable-ukernels=all",
"--iree-global-opt-enable-quantized-matmul-reassociation",
]
Expand Down Expand Up @@ -92,6 +93,7 @@ def SDXL_CLIP_COMMON_RUN_FLAGS(
f"--iree-hip-target={rocm_chip}",
"--iree-input-type=torch",
"--iree-opt-const-eval=false",
"--iree-opt-strip-assertions=true",
"--iree-global-opt-propagate-transposes=true",
"--iree-opt-outer-dim-concat=true",
"--iree-hip-waves-per-eu=2",
Expand Down
2 changes: 2 additions & 0 deletions experimental/regression_suite/shark-test-suite-models/sdxl/test_unet.py
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Original file line number Diff line number Diff line change
Expand Up @@ -131,6 +131,7 @@
"--iree-llvmcpu-fail-on-out-of-bounds-stack-allocation=false",
"--iree-llvmcpu-distribution-size=32",
"--iree-opt-const-eval=false",
"--iree-opt-strip-assertions=true",
"--iree-llvmcpu-enable-ukernels=all",
"--iree-global-opt-enable-quantized-matmul-reassociation",
]
Expand Down Expand Up @@ -194,6 +195,7 @@ def SDXL_PUNET_INT8_FP8_OUT(
"--iree-hal-target-backends=rocm",
f"--iree-hip-target={rocm_chip}",
"--iree-opt-const-eval=false",
"--iree-opt-strip-assertions=true",
"--iree-global-opt-propagate-transposes=true",
"--iree-dispatch-creation-enable-fuse-horizontal-contractions=true",
"--iree-dispatch-creation-enable-aggressive-fusion=true",
Expand Down
2 changes: 2 additions & 0 deletions experimental/regression_suite/shark-test-suite-models/sdxl/test_vae.py
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Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,7 @@
"--iree-llvmcpu-fail-on-out-of-bounds-stack-allocation=false",
"--iree-llvmcpu-distribution-size=32",
"--iree-opt-const-eval=false",
"--iree-opt-strip-assertions=true",
"--iree-llvmcpu-enable-ukernels=all",
"--iree-global-opt-enable-quantized-matmul-reassociation",
]
Expand All @@ -63,6 +64,7 @@ def SDXL_VAE_COMMON_RUN_FLAGS(
"--iree-hal-target-backends=rocm",
f"--iree-hip-target={rocm_chip}",
"--iree-opt-const-eval=false",
"--iree-opt-strip-assertions=true",
"--iree-global-opt-propagate-transposes=true",
"--iree-opt-outer-dim-concat=true",
"--iree-llvmgpu-enable-prefetch=true",
Expand Down
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