Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
gcc: xtensa: Backport patches from upstream/master (v2)
See earlephilhower#29 and earlephilhower#36. List of patches added after earlephilhower#29: 75ab2f0ebd3c6ab678fea03906186068b89f9fbc "xtensa: Apply a few minor fixes" 46880cd8be7c307f147a8785ac8f58e04a35d34e "xtensa: Fix RTL insn cost estimation about relaxed MOVI instructions" ec532b47f1823e71f822c0da781c531ffff67a52 "xtensa: Fix buffer overflow" 773dffc50fbc768e3282455bd4238a67b1481176 "xtensa: Optimize integer constant addition that is between -32896 and 32639" 46dc26fdfbf3e64f82188e21aa6a13ec23108e8e "Improve initialization of objects when the initializer has trailing zeros." e85c94d1c83072d7b894e44009e876dd41ff778a "xtensa: Minor fix for FP constant synthesis" 1884f8978237b15013576a720bcb32e7c5647574 "xtensa: constantsynth: Make try to find shorter instruction" d6d8e6a7e1379f9dfdf2f39efcc82d9185cca6d0 "xtensa: Optimize "bitwise AND with imm1" followed by "branch if (not) equal to imm2"" 2180cdd8a0e65c2790a7732c82de87f83478487b "xtensa: Correct the relative RTX cost that corresponds to the Move Immediate "MOVI" instruction" 64cb87b2381aceaa37230bae7f43c7b9f978d3e3 "xtensa: Optimize "bitwise AND NOT with imm" followed by "branch if (not) equal to zero"" 48e9954d0865b5e5e31cb77ad05c45f7206eeb9f "xtensa: Add RTX costs for if_then_else" 2fa8c4a659a19ec971c80704f48f96c13aae9ac3 "xtensa: Fix conflicting hard regno between indirect sibcall fixups and EH_RETURN_STACKADJ_RTX" a2ff389099c325bc1244b1d72744a18c5fa6fda3 "xtensa: Turn on -fsplit-wide-types-early by default" dca74793cd42ce4c5319943a516cc5ea7265b6f7 "xtensa: Optimize stack pointer updates in function pro/epilogue under certain conditions" 8731aa98674eda56425ffd652918ce4979631f67 "xtensa: Improve indirect sibling call handling" 06c2756e824cfe409d280fc78a0c4f68a9123e49 "xtensa: Eliminate unused stack frame allocation/freeing" 89afb2e86fcb29c559b2957fdcbea0d01740c49b "xtensa: Make complex hard register clobber elimination more robust and accurate"
- Loading branch information