Skip to content
View k0nze's full-sized avatar

Highlights

  • Pro

Block or report k0nze

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
k0nze/README.md

Hi, I'm k0nze! πŸ‘‹

I'm a graduate research assistant working on latency prediction models for AI workloads executed on accelerator hardware enabling fast optimization loops for neural network architecture search (NAS) and pre-silicon hardware evaluation.

My expertise includes:

  • ️⚑ 5+ years of Verilog programming and FPGA synthesis
  • πŸ€– 4+ years in Deep Neural Network applications
  • πŸ‘¨β€πŸ’» 4+ years of C/C++ programming for high-performance computing and embedded devices
  • 🐍 4+ years of Python programming for scientific analysis
  • πŸ¦€ Starting to appreciate Rust

My colleagues describe me as a detail-oriented analytical thinker with a passion for learning new things. I am a team player because I enjoy tackling challenges as a group and discussing problem solutions from different angles to learn from others and share my knowledge.

I am currently working on my PhD thesis at the embedded systems group (Prof. Bringmann) at the University of TΓΌbingen.

Find me elsewhere 🌍

[LinkedIn] [YouTube]

k0nze.dev

Pinned Loading

  1. ekut-es/pico-cnn ekut-es/pico-cnn Public

    Lightweight C implementation of CNNs for Embedded Systems

    C++ 53 7

  2. brainfuck_rust brainfuck_rust Public

    πŸ€―πŸ¦€ A Brainfuck interpreter written in Rust

    Rust

  3. ekut-es/architecture-simulator ekut-es/architecture-simulator Public

    Computer Architecture Simulator for RISC-V and TOY

    Python 2 1

  4. zedboard_pl_to_ps_interrupt_example zedboard_pl_to_ps_interrupt_example Public

    Tutorial on how to use the PL to PS interrupt on the Zedboard

    22 4

  5. zedboard_axi4_master_burst_example zedboard_axi4_master_burst_example Public

    Quick Example how to generate an custom AXI4 IP with AXI4-Full interface (burst) for the Zynq (ZedBoard)

    SystemVerilog 37 8

  6. ultrazed_acp_example ultrazed_acp_example Public

    Tutorial on how to use the AXI ACP on the UltraZed-EG IOCC

    Verilog 8 3