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Add support arena atomics for RV64 #9329

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Pull request for series with
subject: Add support arena atomics for RV64
version: 1
url: https://patchwork.kernel.org/project/netdevbpf/list/?series=983958

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Upstream branch: 42be23e
series: https://patchwork.kernel.org/project/netdevbpf/list/?series=983958
version: 1

@kernel-patches-daemon-bpf
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Upstream branch: 42be23e
series: https://patchwork.kernel.org/project/netdevbpf/list/?series=983958
version: 1

@kernel-patches-daemon-bpf
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Upstream branch: 42be23e
series: https://patchwork.kernel.org/project/netdevbpf/list/?series=983958
version: 1

Pu Lehui added 7 commits July 21, 2025 17:38
There's a lot of redundant code related to store from register
operations, let's extract emit_stx() to make code more compact.

Signed-off-by: Pu Lehui <pulehui@huawei.com>
There's a lot of redundant code related to store from immediate
operations, let's extract emit_st() to make code more compact.

Signed-off-by: Pu Lehui <pulehui@huawei.com>
There's a lot of redundant code related to load into register
operations, let's extract emit_ldx() to make code more compact.

Signed-off-by: Pu Lehui <pulehui@huawei.com>
RV64 bpf is going to support ZACAS instructions. Let's separate
toolchain support dependency from RISCV_ISA_ZACAS.

Signed-off-by: Pu Lehui <pulehui@huawei.com>
Add rv_ext_enabled macro to check whether the runtime detection
extension is enabled.

Signed-off-by: Pu Lehui <pulehui@huawei.com>
Add Zacas instructions introduced by [0] to reduce code size and
improve performance of RV64 JIT.

Link: https://github.com/riscvarchive/riscv-zacas/releases/download/v1.0/riscv-zacas.pdf [0]
Signed-off-by: Pu Lehui <pulehui@huawei.com>
Optimize cmpxchg instruction with amocas.w and amocas.d
Zacas instructions.

Signed-off-by: Pu Lehui <pulehui@huawei.com>
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Upstream branch: 95993dc
series: https://patchwork.kernel.org/project/netdevbpf/list/?series=983958
version: 1

Pu Lehui added 3 commits July 21, 2025 17:38
Add ex_insn_off and ex_jmp_off fields to struct rv_jit_context so that
add_exception_handler() does not need to be immediately followed by the
instruction to add the exception table. ex_insn_off indicates the offset
of the instruction to add the exception table, and ex_jmp_off indicates
the offset to jump over the faulting instruction. This is to prepare for
adding the exception table to atomic instructions later, because some
atomic instructions need to perform zext or other operations.

Signed-off-by: Pu Lehui <pulehui@huawei.com>
Add arena atomics support for RMW atomics and load-acquire and
store-release instructions. Non-Zacas cmpxchg is implemented via loop,
which is not currently supported because it requires more complex
extable and loop logic.

Signed-off-by: Pu Lehui <pulehui@huawei.com>
Enable arena atomics tests for RV64.

Signed-off-by: Pu Lehui <pulehui@huawei.com>
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