LiteX support changes (#756) #3089
main.yml
on: push
Synthesize full core
44s
Build regression tests (riscv-tests)
44s
Build regression tests (riscv-arch-test)
40s
Run unit tests
5m 34s
Check code formatting and typing
1m 14s
Run regression tests (riscv-tests)
6m 25s
Run regression tests (riscv-arch-test)
15m 41s
Artifacts
Produced during runtime
Name | Size | |
---|---|---|
verilog-full-core
|
540 KB |
|