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[SeqToSV] Prepend RANDOMIZE-defining snippets #6882

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@seldridge seldridge commented Mar 30, 2024

Fix an issue where the RANDOMIZE Verilog macro was used before it was
defined.

@seldridge seldridge requested a review from nandor March 30, 2024 02:41
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nandor commented Mar 30, 2024

Wouldn't it be simpler to change the order at

context, {randomInitFragmentName, randomInitRegFragmentName});
?

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nandor commented Mar 30, 2024

Actually, I don't think that prepend/append is the problem here, it's the fragments themselves that have to be shuffled around

Fix an issue where the RANDOMIZE Verilog macro was used before it was
defined.

Co-authored-by: Nandor Licker <n@ndor.email>
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
@seldridge seldridge force-pushed the dev/seldridge/fix-RANDOMIZE-undefined branch from 8ebe0e8 to e60c1d6 Compare March 30, 2024 03:11
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You are entirely correct. Swapping the order gets things working and this fixes the observed internal bug.

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LGTM

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Still not correct, behaviour is iffy because fragments can get mixed as reg init -> init -> mem init -> init. I'm working on addressing that.

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nandor commented Mar 30, 2024

Possible fix here: #6883

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Closing in favor of #6683.

@seldridge seldridge closed this Mar 30, 2024
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