-
Notifications
You must be signed in to change notification settings - Fork 304
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
[Verif] Simplify the FormalOp #7691
Conversation
Simplify the definition of the `verif.formal` operation which describes a single formal unit test. This op used to have a "k" parameter which is now gone in favor of more generically using the attributes dictionary to capture execution parameters. As we build out the testing flows, we can reintroduce necessary attributes to this operation. Rename `verif.symbolic_input` to `verif.symbolic_value`. Remove `verif.concrete_input` in favor of explicitly describing the concrete input using one of the registers in the Seq dialect. This also makes the associated clock explicit, which was missing from this op.
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
This seems reasonable to me!
One footgun with this approach is that the attributes could now be discarded. We can introduce something separate, e.g., a dedicated parameter that contains mandatory arguments so that this is guaranteed to be preserved. However, I don't see a reason to do this now.
Good point about the discardable arguments. Once we actually rely on them, we could add a dedicated dictionary property that actually contains the parameters. That wouldn't be discardable. |
@fabianschuiki the entire point of having |
damn these PRs are going through at lightning speed, I have yet to have had the time to catch one before it gets merged in ^^" |
Also we used the K as an operand because it's mandatory information to know how to perform our bounded model check. Like |
Hmmm yeah the clocking part is challenging. I'm not entirely sure yet whether clocks should get any special treatment during formal verification. It's pretty common for tools to just treat them as regular inputs. In the BMC you would then check for clock toggles to decide whether you use the previous cycle's data input as the current value, or the previous data output (in case of no clock). There's an optimization in there where you detect that the circuit doesn't make any progress without a clock, e.g. when there's one unique clock and no I/O paths. In that case the tool may decide to always assume a clock toggle. This feels like an optimization in the verif tool though. My plan is to figure out how we can run these
I agree, that's true for a BMC. But there are other ways you could formally verify |
I agree with the other parts of your comment, but in practice when you perform induction you will actually be using k-induction, which is a version that has a stronger induction hypothesis and base-case based on using k steps in your transition system, so I do think that we would need to have this K somewhere. Either way, the only back-ends directly supported in CIRCT for now are BMC-based afaik. But if you want to use this for generating SV then I feel like you should simply specify that k can be ignored at the tool-level, like in |
Great point about a default value for k. That might be a good starting point. And you're right, in practice you'll probably have to specify the k for most of your tests because it's an attribute of the test itself, and you wouldn't want your tests to start breaking just because some default unroll bound got changed. |
Simplify the definition of the
verif.formal
operation which describes a single formal unit test. This op used to have a "k" parameter which is now gone in favor of more generically using the attributes dictionary to capture execution parameters. As we build out the testing flows, we can reintroduce necessary attributes to this operation.Rename
verif.symbolic_input
toverif.symbolic_value
.Remove
verif.concrete_input
in favor of explicitly describing the concrete input using one of the registers in the Seq dialect. This also makes the associated clock explicit, which was missing from this op.