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Sonata system v1.0

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@marnovandermaas marnovandermaas released this 08 Nov 13:23
· 50 commits to main since this release
v1.0
0ec0807

This is a stable release, from here on out we aim not to make any software visible changes to the hardware. Please note that software that ran on v0.4 and v0.2 will not be compatible with v1.0 because of improvements that we think are necessary for the longevity of the project. Please use the v1.0 branch of the sonata software repository for compatible software.

Release Notes

This release contains on top of the previous v0.4 release:

  • New functionality:
    • Pin multiplexer and padring. You can see a diagram of the connection possible through the pinmux here.
    • Pmod 0 and 1 now also have I2C and SPI connections, and Pmod C is now also accessible.
    • SPI chip selects can now be compartmentalized as they are controlled by each SPI host separately.
    • Support software slots in bootloader. On boot the bootloader will look at the software switch to determine which program to run.
    • Live switching of bitstreams so that when you change the bitstream selector the FPGA will be reprogrammed without having to unplug and replug the board.
    • GPIO output enable is now software accessible.
    • Interrupt are refactored so that each block just has one interrupt.
    • System information IP for reporting git build hash, system frequency and IP block numbers.
    • RS-485 now connected up.
    • LCD backlight now dimmable.
  • Quality and performance improvements:
    • Main system clock is now 40 MHz up from 30 MHz.
    • Timing and pin constraints reworked.
    • Improve TL-UL bus access latency. Before access to SRAM went through multiple FIFOs, which added multiple cycles of latency. This is now reduced so that you can have single-cycle access to SRAM.
    • Area improvements including reducing FIFO sizes in I2C and UART.
    • FPGA build and testing in CI.
    • Linting and more checks in CI.
    • I2C and SPI DPI model for simulation.

Bitstream information

The utilization of the bitstream:

Type Used Available Percentage
Slice LUTs 22,691 32,600 69.60%
Slice Registers 15,618 65,200 23.95%
Block RAM Tiles 41 75 54.67%
DSPs 13 120 10.83%

Other bitstream statistics:

Name Value
Overall WNS 0.120 ns
System clock WNS 0.120 ns
HyperRAM clock WNS 2.298 ns
USB clock WNS 7.848 ns
Total on-chip power 0.313 W

Quick start guide

Here's the developer flow for using these files:

  • Make sure the bitstream select switch (immediately below the main USB-C port) is set to position 1.
  • Before plugging in your Sonata board, hold down the "SW9" button labeled "RP2040 Boot", and while holding this button plug your board into your laptop using the Main USB.
  • A drive called "RPI-RP2" should pop up on your computer and copy rpi_rp2_v1.0.uf2 into it.
  • This drive should automatically dismount once the file is transferred and remount as "SONATA". Once the remount has happened, you can drag in the wrapped bitstream sonata_bitstream_v1.0.bit.slot1.uf2.
  • Once programming is successful, you should see the "CHERI" LED light up and the "LEGACY" LED turn off. If this is not the case, the bitstream loading may have failed and you should retry by unplugging and replugging the main USB on the Sonata board. Then re-drag the bitstream into the "SONATA" drive.
  • After programming the bitstream, select position 1 on the "SW App" switch (bottom left corner of the board) drag the sonata_simple_demo_v1.0.slot1.uf2 into the "SONATA" drive.
  • You should now see the user LEDs turn on and off, as well as the lowRISC logo appear on the LCD.
  • You can also drag snake_demo_v1.0.slot2.uf2 into the SONATA drive to play snake using the joystick.
  • After copying the snake demo across select position 2 on the "SW App" switch and reset the board (with the reset button or a power cycle) to run it
  • Watch the CHERI error LEDs as you hit the boundary.

As a next step, have a look at our getting started guide.

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