Skip to content

Revert 64-bit interlocked intrinsics on x86 #1222

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
StephanTLavavej merged 1 commit into from
Aug 26, 2020
Merged

Revert 64-bit interlocked intrinsics on x86 #1222

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
12 changes: 6 additions & 6 deletions stl/inc/atomic
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1058,7 +1058,7 @@ struct _Atomic_storage<_Ty, 8> { // lock-free using 8-byte intrinsics
return reinterpret_cast<_TVal&>(_As_bytes);
}

#if defined(_M_IX86) && defined(__clang__) // TRANSITION, LLVM-46595
#ifdef _M_IX86
_TVal exchange(const _TVal _Value, const memory_order _Order = memory_order_seq_cst) noexcept {
// exchange with (effectively) sequential consistency
_TVal _Temp{load()};
Expand All @@ -1067,15 +1067,15 @@ struct _Atomic_storage<_Ty, 8> { // lock-free using 8-byte intrinsics

return _Temp;
}
#else // ^^^ defined(_M_IX86) && defined(__clang__), LLVM-46595 / !defined(_M_IX86) || !defined(__clang__) vvv
#else // ^^^ _M_IX86 / !_M_IX86 vvv
_TVal exchange(const _TVal _Value, const memory_order _Order = memory_order_seq_cst) noexcept {
// exchange with given memory order
long long _As_bytes;
_ATOMIC_CHOOSE_INTRINSIC(_Order, _As_bytes, _InterlockedExchange64, _Atomic_address_as<long long>(_Storage),
_Atomic_reinterpret_as<long long>(_Value));
return reinterpret_cast<_TVal&>(_As_bytes);
}
#endif // ^^^ !defined(_M_IX86) || !defined(__clang__) ^^^
#endif // _M_IX86

bool compare_exchange_strong(_TVal& _Expected, const _TVal _Desired,
const memory_order _Order = memory_order_seq_cst) noexcept { // CAS with given memory order
Expand Down Expand Up @@ -1517,7 +1517,7 @@ struct _Atomic_integral<_Ty, 8> : _Atomic_storage<_Ty> { // atomic integral oper
using _Base::_Base;
#endif // ^^^ no workaround ^^^

#if defined(_M_IX86) && defined(__clang__) // TRANSITION, LLVM-46595
#ifdef _M_IX86
_TVal fetch_add(const _TVal _Operand, const memory_order _Order = memory_order_seq_cst) noexcept {
// effectively sequential consistency
_TVal _Temp{this->load()};
Expand Down Expand Up @@ -1570,7 +1570,7 @@ struct _Atomic_integral<_Ty, 8> : _Atomic_storage<_Ty> { // atomic integral oper
return fetch_add(static_cast<_TVal>(-1)) - static_cast<_TVal>(1);
}

#else // ^^^ defined(_M_IX86) && defined(__clang__), LLVM-46595 / !defined(_M_IX86) || !defined(__clang__) vvv
#else // ^^^ _M_IX86 / !_M_IX86 vvv
_TVal fetch_add(const _TVal _Operand, const memory_order _Order = memory_order_seq_cst) noexcept {
long long _Result;
_ATOMIC_CHOOSE_INTRINSIC(_Order, _Result, _InterlockedExchangeAdd64,
Expand Down Expand Up @@ -1620,7 +1620,7 @@ struct _Atomic_integral<_Ty, 8> : _Atomic_storage<_Ty> { // atomic integral oper
_TVal operator--() noexcept {
return static_cast<_TVal>(_InterlockedDecrement64(_Atomic_address_as<long long>(this->_Storage)));
}
#endif // ^^^ !defined(_M_IX86) || !defined(__clang__) ^^^
#endif // _M_IX86
};

#if 1 // TRANSITION, ABI
Expand Down