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TRB and TSB 65c02 instructions don't set Z bit correctly #32
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commented out because they are for alternate versions of the 65C02 and we do not implement these opcodes) Fix some arithmetic underflow bugs due to python's % operator working differently than assumed on negative numbers (they aren't brought into the [0...n) interval) 65C02 actually fixed some of the processor bugs we implemented in a previous CL: - indirect JMP no longer mis-reads the high byte when crossing page boundaries - DECIMAL flag now correctly reset across BRK So unimplement these processor bugs. Interestingly, the py65 project where I got these tests from seems to have bugs in handling of the Z bit in the TSB/TRB operations (see mnaberez/py65#32), and this implementation seems to do it correctly. Unfortunately this implementation also had a buggy TSB (result = operand | self.a, not '+') DEA and INA update A
Thanks for the report @KrisKennaway - I came to have a look and see that @mnaberez has already fixed it. Thanks Mike! @KrisKennaway I do recommend also running Klaus Dormann's test suite if you can. He has an extended suite for the 'C02. See |
Thanks for the quick response, and for the pointer to Klaus's test suites. I have got that running and it looks like the 65C02 one is not passing still (the 6502 and decimal tests both are), I'll take a closer look and open a new issue. |
I think the logic for setting the zero bit for TRB and TSB is inverted. It should be setting Z if "m & self.a == 0" (not != 0)
This matches what is described here: http://6502.org/tutorials/65c02opcodes.html#4 and I can replicate this behaviour in another emulator. For example, here's what I get on the Virtual II emulator configured to emulate a 65C02:
*0800: a9 e0 85 bb a9 70 14 bb 00
*0800L
0800- A9 E0 LDA #$E0
0802- 85 BB STA $BB
0804- A9 70 LDA #$70
0806- 14 ???
0807- BB ??? # TRB $BB
0808- 00 BRK
*0800g
080A- A=70 X=FF Y=FF P=30 S=EA
P = 0x30 has the ZERO bit (0x2) clear but test_trb_sp_ones expects it (and mpu65c02 sets it). Similarly for all the other TRB and TSB test cases.
I found this when adapting these conformance test suites to validate another 65c02 simulator which turned out not to have this bug (but it did find many others -- so these tests were super useful, although now perhaps I have to look again more carefully!)
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