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Klaus Dormann's 65C02 functional tests are not passing #33
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trace the execution of the currently failing decimal-mode ADC test, see mnaberez#33
Self-contained test case, passes on Virtual II
But fails against mpu65c02:
|
Yeah, that's an unfortunate license for a test suite. It can't be included in non-GPL projects like this one. It will not be acceptable to use that code here. |
We can still use it to debug though :) I think the bug is here in opADC:
I think this should be the adjusted value, BTW another small issue is that this code is in mpu6502 but according to http://6502.org/tutorials/65c02opcodes.html the 6502 did not set these flags in decimal mode. |
Absolutely. @BigEd, any chance you could look at this? You had fixed some other BCD bugs in the past. I can't remember the last time I used BCD mode myself. |
I think KrisKennaway@666cd9c fixes it. The test suite now passes (with the above caveats about unimplemented opcodes) and it claims to exhaustively test the valid BCD operations. |
That sounds good enough for me @KrisKennaway! For future reference: I think Klaus' suite tests BCD last of all, so once you've got that far, it can sometimes help to swap to Bruce's decimal tests. For a 65C02 test, check out Appendix D: |
Oh, hang on... @KrisKennaway your change is an update to mpu6502.py - I thought you were aiming to test and correct mpu65c02.py? Ideally both would be correct, with respect to the appropriate testsuite. But I'm not sure it's possible for them to be correct against the other testsuite! |
Yes you're right of course -- 6502 and 65c02 do not have mutually compatible behaviour here, neither in treatment of flags nor in behaviour for invalid operands. I've got something that passes the full decimal mode test suite for both processors including all flags and invalid operands, I'll clean that up for submission. Happily the relevant test code is public domain so we can also ship the source and assembled binary test code. |
Excellent. Thanks for your work on this! |
Any chance BBR/BBS/BBT will be added to the emulator? |
Yes. The intention is that it will support all the opcodes of the WDC W65C02S. |
Just curious. The 65C02 Rockwell bit-oriented instructions are RMBx/SMBx zp, and BBRx/BBSx zp,rel8. What is the BBT instruction being discussed in a previous message? |
Never mind. I've added these 16 instructions to my M65C02A Python device model, but I've not successfully gotten the built-in Py65 assembler/disassembler to recognize the syntax and produce a correct output. Johan: if you'd like to try to incorporate the instructions into the mpu65C02.py model and get the assembler and disassembler to recognize the instructions correctly, you can look in https://github.com/MorrisMA/py65/blob/master/py65/devices/mpuM65C02A.py to see how I implemented these instructions. I use a slightly different organization of the instruction decoder that used by the other Py65 processor device models. Instead of being organized by rows in the opcode table, my model's instruction table is organized the columns. This is done in order to match the M65C02A model to the instruction decoder incorporated into the microprogrammed Verilog implementation. Please be aware that I've not been working on this model for a while, AND I've definitely not run the model against Klaus' test suite. That statement applies to both the Python model and the Verilog model. Previous incarnations / releases of the Verilog model successfully passed Klaus' test suite with minor tweaks related to the addresses on the stack for JSR, BRK, and interrupts; these differences between my 6502/65C02 models and the standard models are clearly discussed in the accompanying documentation. Furthermore, I'm not currently including the WDC WAI and STP instructions; I am using those two opcodes for something else in my current models. |
Hi @KrisKennaway it looks like you did the work to fix BCD - assuming we don't already have it, please could you send a pull request? (I think I'd prefer to fix and close BCD with this issue, and have a new issue for missing opcodes, if indeed they are still missing.) |
See https://github.com/KrisKennaway/py65/blob/master/py65/tests/devices/test_klaus.py for a test suite that runs these against py65.
I didn't commit the binaries because they're GPL'ed but two of them are checked in here: https://github.com/Klaus2m5/6502_65C02_functional_tests/tree/master/bin_files
The 6502_decimal_test I built as "as65 -l -m -w -h0 6502_decimal_test.a65"
Actually the rebuilt ones need a small tweak to load at 0x0a instead of 0x00 which the prebuilt ones are. Probably there's some way to make as65 do that.
The 65C02_extended_opcodes_test.bin is currently not passing. The first place it dies at is in the opcode tests for BBR/BBS/BBT which are not implemented on this simulator. Setting rkwl_wdc_op = 0 to test these opcodes as NOPs is not enough because (at least) the 5C opcode does not behave this way.
If you delete these nop_tests and the BBR/BBS/BBT ones (so that it still tests the RMB/SMB opcodes which are implemented here) then it correctly picks up the TSB/TRB bug that was fixed in #32
It now fails here
which is here in my version:
https://github.com/Klaus2m5/6502_65C02_functional_tests/blob/master/bin_files/6502_functional_test.lst#L13099 (different address offset because I deleted code)
Adding some tracing I think it's failing when it gets to 0xb=0x99, 0xc=0x99 and carry set.
Failing test case is:
i.e. it's expecting N to be set which it is not.
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