Adding and updating snippets

[jessicarod7]

This pull request reorganizes the snippets included with the extension, making them easier to find, and adding other ones I think would be useful. This closes #128.

Here is a list of changes made:

• Slight update to .gitignore to prevent additional .vscode files from appearing.
• Updating prefixes on existing snippets to make them easier to find. For example, the prefix always_ff will also recognize ff being typed. Prefixes modified can be viewed for Verilog (1, 2) and SystemVerilog. This also resolves change the line 3 in verilog.json #94.
• Removed redundant snippets (appearing both for Verilog and SystemVerilog), and moved Verilog-compatible snippets out of the SystemVerilog file (ex. timescale, forever). These can be viewed for SystemVerilog and Verilog.
• Added a number of other commonly used snippets. For Verilog, this includes localparam, casex, integer,
  `ifdef, `default_nettype, and generate. For SystemVerilog, it includes package, import, and modport. This file from the first commit resolves [Feature Request] Snippet for always_latch missing #99.

Thanks for maintaining this extension, it's really useful.

[mshr-h]

Hi @cam-rod , thanks for the great PR.
I reviewed the PR and I think all of the changes would contribute improvement of snippets usability.