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implementation for shift left logical immediate riscv32im #2836

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merged 4 commits into from
Dec 16, 2024
Merged

implementation for shift left logical immediate riscv32im #2836

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2c0c7b2
implementation for shift left logical immediate
svv232 Nov 25, 2024
29b12a8
correctly parse the shant
svv232 Dec 11, 2024
c5a3073
keep the standard variable allocation syntax for interpreter variable…
svv232 Dec 11, 2024
4ba3d58
parse the shamt at the top level and add correct range and value check
svv232 Dec 11, 2024
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16 changes: 15 additions & 1 deletion o1vm/src/interpreters/riscv32im/interpreter.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -1752,7 +1752,21 @@ pub fn interpret_itype<Env: InterpreterEnv>(env: &mut Env, instr: IInstruction)
env.set_next_instruction_pointer(next_instruction_pointer + Env::constant(4u32));
}
IInstruction::ShiftLeftLogicalImmediate => {
unimplemented!("ShiftLeftLogicalImmediate")
// slli: x[rd] = x[rs1] << shamt
let local_rs1 = env.read_register(&rs1);
let shamt = {
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Can you add some FIXME reg. this comment please? Can be done later.

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Note that a test is ready in master reg. sll, see assembly code. Only lui should be implemented.

let pos = env.alloc_scratch();
unsafe { env.bitmask(&imm, 5, 0, pos) }
};
// parse shamt from imm as 20-24 of instruction and 0-4 wrt to imm
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what is this comment for?

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it was removed, but it was explaining where in the instruction and immediate the shamt was parsed from.

let local_rd = {
let pos = env.alloc_scratch();
unsafe { env.shift_left(&local_rs1, &shamt, pos) }
};

env.write_register(&rd, local_rd);
env.set_instruction_pointer(next_instruction_pointer.clone());
env.set_next_instruction_pointer(next_instruction_pointer + Env::constant(4u32));
}
IInstruction::ShiftRightLogicalImmediate => {
unimplemented!("ShiftRightLogicalImmediate")
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