-
Notifications
You must be signed in to change notification settings - Fork 103
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
implementation for shift left logical immediate riscv32im #2836
implementation for shift left logical immediate riscv32im #2836
Conversation
Codecov ReportAttention: Patch coverage is
Additional details and impacted files@@ Coverage Diff @@
## master #2836 +/- ##
==========================================
- Coverage 72.04% 72.02% -0.03%
==========================================
Files 256 257 +1
Lines 60138 60759 +621
==========================================
+ Hits 43329 43761 +432
- Misses 16809 16998 +189 ☔ View full report in Codecov by Sentry. |
let local_rs1 = env.read_register(&rs1); | ||
let shamt = { | ||
let pos = env.alloc_scratch(); | ||
unsafe { env.bitmask(&imm, 4, 0, pos) } |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Is it not 5?
/// Format: `slli rd, rs1, shamt`
///
/// Description: Performs logical left shift on the value in register rs1 by
/// the shift amount held in the lower 5 bits of the immediate
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
See #2865
unsafe { env.bitmask(&imm, 4, 0, pos) } | ||
}; | ||
// parse shamt from imm as 20-24 of instruction and 0-4 wrt to imm | ||
let rd_scratch = env.alloc_scratch(); |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Nit: I would simply keep the same syntax as the others to allocate variables, like:
let local_rd = {
let pos = env.alloc_scratch();
unsafe { env.shift_left(&local_rs1, &shamt, rd_scratch) }
};
But it is a very small detail.
let local_rs1 = env.read_register(&rs1); | ||
let shamt = { | ||
let pos = env.alloc_scratch(); | ||
unsafe { env.bitmask(&imm, 4, 0, pos) } |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
There must also be constraints that it is actually 5 bits, and also the 5 lowest bits of the immediate.
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
This is incorrect. See comments above.
unimplemented!("ShiftLeftLogicalImmediate") | ||
// slli: x[rd] = x[rs1] << shamt | ||
let local_rs1 = env.read_register(&rs1); | ||
let shamt = { |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Can you add some FIXME reg. this comment please? Can be done later.
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Note that a test is ready in master reg. sll, see assembly code. Only lui should be implemented.
let pos = env.alloc_scratch(); | ||
unsafe { env.bitmask(&imm, 5, 0, pos) } | ||
}; | ||
// parse shamt from imm as 20-24 of instruction and 0-4 wrt to imm |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
what is this comment for?
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
it was removed, but it was explaining where in the instruction and immediate the shamt was parsed from.
No description provided.