src: cpu: aarch64: move jit_sve conv above acl conv in convolution_list #2403
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The isa variable was not being set correctly, leading to a failing check for supported post-ops. With this change, problems with 1x1 kernel and post-ops now run about 20%-40% faster on average than when using the regular jit_sve_conv.
jit_sve conv performs about x1.3 better than acl_conv on average and jit_sve_1x1 conv performs x1.3-x3 better on average depending on the number of threads.
theComputeKid
approved these changes
Jan 16, 2025
Just for the record: I wouldn't call "solving" a solution when making one code running over the other. Rather "sweeping under the rug". Once the code gets executed, sporadic issues will pop up back, but with less context. |
dzarukin
approved these changes
Jan 16, 2025
|
@dzarukin I agree, and that is why the reported issue is still open and not linked to this PR. |
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In benchdnn testing, jit_sve conv performs about x1.3 better than acl conv on average and jit_sve_1x1 conv performs x1.3-x3 better on average depending on the number of threads. In testing with CNNs, we got a 10-15% speed-up by using jit_sve and jit_sve_1x1 conv. So, they should be the preferred implementations whenever possible.